feat(backend): Add register allocation, code generation, and CFG optimizations

Cargo.toml

@@ -0,0 +1,56 @@
+[workspace]
+members = [
+    "crates/synth-cli",
+    "crates/synth-core",
+    "crates/synth-frontend",
+    "crates/synth-analysis",
+    "crates/synth-synthesis",
+    "crates/synth-backend",
+    "crates/synth-wit",
+    "crates/synth-qemu",
+    "crates/synth-abi",
+    "crates/synth-cfg",
+    "crates/synth-opt",
+    "crates/synth-regalloc",
+    "crates/synth-codegen",
+]
+resolver = "2"
+
+[workspace.package]
+version = "0.1.0"
+edition = "2021"
+authors = ["PulseEngine Team"]
+license = "Apache-2.0 OR MIT"
+repository = "https://github.com/pulseengine/Synth"
+
+[workspace.dependencies]
+# WebAssembly tooling
+wasmparser = "0.219"
+wasm-encoder = "0.219"
+wit-parser = "0.219"
+wit-component = "0.219"
+
+# Serialization
+serde = { version = "1.0", features = ["derive"] }
+serde_json = "1.0"
+toml = "0.8"
+
+# Error handling
+anyhow = "1.0"
+thiserror = "1.0"
+
+# CLI
+clap = { version = "4.5", features = ["derive"] }
+
+# Logging
+tracing = "0.1"
+tracing-subscriber = "0.3"
+
+# Testing
+proptest = "1.4"
+
+[profile.release]
+lto = true
+codegen-units = 1
+strip = true
+opt-level = 3