update b200 peak memory bandwidth

[danielvegamyhre]

This twitter post claimed B200 memory bandwidth is actually 7680gbps, not 8192gbps, as the original bitwidth of the memory bus reported by CUDA drivers has been updated/corrected from 8192 bits to 7680 bits.

I confirmed this claim using Claude to write a simple CUDA C++ file to query the device driver:

=== Device 0: NVIDIA B200 ===
Memory Bus Width: 7680 bits
Total Global Memory: 178.35 GB
L2 Cache Size: 126.50 MB
Compute Capability: 10.0
Number of SMs: 148
Warp Size: 32
Max Threads per Block: 1024
Max Threads per SM: 2048
Shared Memory per Block: 48.00 KB
Shared Memory per SM: 228.00 KB
Registers per Block: 65536
Registers per SM: 65536
ECC Enabled: Yes

And nvidia-smi to get the memory clock frequency:

nvidia-smi --query-gpu=clocks.mem,clocks.max.mem --format=csv

clocks.current.memory [MHz], clocks.max.memory [MHz]
3996 MHz, 3996 MHz

Bandwidth = (7680bits/8bits per byte)*(3996 MHz memory clock) * 2 DDR / 1e12 = 7.672 TB/s

This PR updates our benchmark/roofline utils accordingly.

[pytorch-bot]

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[vkuzo]

I think this should definitely keep the source from nvidia, and also cite the additional source you are mentioning in the PR summary

[danielvegamyhre]

Updated

[vkuzo]

lg once source is updated!