Pack buffer-backed tensors correctly when moving into and out of staging #4673
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Summary: ## Context Previously, pytorch#4594 was landed which removed zero padding for buffer-backed tensors. As part of this change, the staging <-> GPU Buffer shaders were implemented as a direct buffer to buffer copy. However, the direct buffer to buffer copy does not account for the GPU memory layout argument; essentially, buffer backed tensors would always be packed with a contiguous memory layout. This diff adds proper staging <-> buffer shaders such that buffer-backed tensors will have the correct memory layout on the GPU as specified by the provided memory layout. Reviewed By: copyrightly Differential Revision: D61150844
🔗 Helpful Links🧪 See artifacts and rendered test results at hud.pytorch.org/pr/pytorch/executorch/4673
Note: Links to docs will display an error until the docs builds have been completed. ✅ No FailuresAs of commit f847ad4 with merge base 9b2bfb6 ( This comment was automatically generated by Dr. CI and updates every 15 minutes. |
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Summary:
Context
Previously, #4594 was landed which removed zero padding for buffer-backed tensors. As part of this change, the staging <-> GPU Buffer shaders were implemented as a direct buffer to buffer copy. However, the direct buffer to buffer copy does not account for the GPU memory layout argument; essentially, buffer backed tensors would always be packed with a contiguous memory layout.
This diff adds proper staging <-> buffer shaders such that buffer-backed tensors will have the correct memory layout on the GPU as specified by the provided memory layout.
Reviewed By: copyrightly
Differential Revision: D61150844