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@zhangxiaoli73 zhangxiaoli73 tagged this 15 Jun 00:05
### Summary

We are working on add XPU symmetric backend and also want to enable symm ops (async TP) for XPU.

### Motivation

We are working on add XPU symmetric backend and also want to enable symm ops (async TP) for XPU.  With those symm ops, communication and computation could be overlapped to reduce communication overhead on Intel client GPUs.

### Changes

- Backend enabling in https://github.com/intel/torch-xpu-ops/pull/2041
- Python ops enabling in this PR

### Test Plan

Ops test is verified via https://github.com/intel/torch-xpu-ops/pull/3747

Pull Request resolved: https://github.com/pytorch/pytorch/pull/185102
Approved by: https://github.com/guangyey, https://github.com/gujinghui, https://github.com/jansel
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