PCIe pwrctrl changes to support cascade switches

Documentation/devicetree/bindings/pci/toshiba,tc9563.yaml

@@ -7,7 +7,7 @@ $schema: http://devicetree.org/meta-schemas/core.yaml#
 title: Toshiba TC9563 PCIe switch
 
 maintainers:
-  - Krishna chaitanya chundru <quic_krichai@quicinc.com>
+  - Krishna Chaitanya Chundru <krishna.chundru@oss.qualcomm.com>
 
 description: |
   Toshiba TC9563 PCIe switch has one upstream and three downstream ports.
@@ -26,7 +26,7 @@ properties:
   reg:
     maxItems: 1
 
-  reset-gpios:
+  resx-gpios:
     maxItems: 1
     description:
       GPIO controlling the RESX# pin.
@@ -47,15 +47,15 @@ properties:
     $ref: /schemas/types.yaml#/definitions/phandle-array
     description:
       A phandle to the parent I2C node and the slave address of the device
-      used to do configure tc9563 to change FTS, tx amplitude etc.
+      used to configure tc9563 to change FTS, tx amplitude etc.
     items:
       - description: Phandle to the I2C controller node
       - description: I2C slave address
 
 patternProperties:
   "^pcie@[1-3],0$":
     description:
-      child nodes describing the internal downstream ports
+      child nodes describing the internal downstream ports of
       the tc9563 switch.
     type: object
     allOf:
@@ -76,10 +76,11 @@ $defs:
         type: boolean
         description:
           Disable DFE (Decision Feedback Equalizer), which mitigates
-          intersymbol interference and some reflections caused by impedance mismatches.
+          intersymbol interference and some reflections caused by
+          impedance mismatches.
 
 required:
-  - reset-gpios
+  - resx-gpios
   - vdd18-supply
   - vdd09-supply
   - vddc-supply
@@ -130,7 +131,7 @@ examples:
                 vddio2-supply = <&vdd>;
                 vddio18-supply = <&vdd>;
 
-                reset-gpios = <&gpio 1 GPIO_ACTIVE_LOW>;
+                resx-gpios = <&gpio 1 GPIO_ACTIVE_LOW>;
 
                 pcie@1,0 {
                     compatible = "pciclass,0604";

drivers/pci/bus.c

@@ -343,7 +343,6 @@ void __weak pcibios_bus_add_device(struct pci_dev *pdev) { }
 void pci_bus_add_device(struct pci_dev *dev)
 {
 	struct device_node *dn = dev->dev.of_node;
-	struct platform_device *pdev;
 
 	/*
 	 * Can not put in pci_device_add yet because resources
@@ -357,24 +356,6 @@ void pci_bus_add_device(struct pci_dev *dev)
 	pci_proc_attach_device(dev);
 	pci_bridge_d3_update(dev);
 
-	/*
-	 * If the PCI device is associated with a pwrctrl device with a
-	 * power supply, create a device link between the PCI device and
-	 * pwrctrl device.  This ensures that pwrctrl drivers are probed
-	 * before PCI client drivers.
-	 */
-	pdev = of_find_device_by_node(dn);
-	if (pdev) {
-		if (of_pci_supply_present(dn)) {
-			if (!device_link_add(&dev->dev, &pdev->dev,
-					     DL_FLAG_AUTOREMOVE_CONSUMER)) {
-				pci_err(dev, "failed to add device link to power control device %s\n",
-					pdev->name);
-			}
-		}
-		put_device(&pdev->dev);
-	}
-
 	if (!dn || of_device_is_available(dn))
 		pci_dev_allow_binding(dev);
 

drivers/pci/controller/dwc/pcie-designware-host.c

@@ -856,28 +856,10 @@ static void __iomem *dw_pcie_ecam_conf_map_bus(struct pci_bus *bus, unsigned int
 	return pci->dbi_base + where;
 }
 
-static int dw_pcie_op_start_link(struct pci_bus *bus)
-{
-	struct dw_pcie_rp *pp = bus->sysdata;
-	struct dw_pcie *pci = to_dw_pcie_from_pp(pp);
-
-	return dw_pcie_host_start_link(pci);
-}
-
-static void dw_pcie_op_stop_link(struct pci_bus *bus)
-{
-	struct dw_pcie_rp *pp = bus->sysdata;
-	struct dw_pcie *pci = to_dw_pcie_from_pp(pp);
-
-	dw_pcie_host_stop_link(pci);
-}
-
 static struct pci_ops dw_pcie_ops = {
 	.map_bus = dw_pcie_own_conf_map_bus,
 	.read = pci_generic_config_read,
 	.write = pci_generic_config_write,
-	.start_link = dw_pcie_op_start_link,
-	.stop_link = dw_pcie_op_stop_link,
 };
 
 static struct pci_ops dw_pcie_ecam_ops = {

drivers/pci/controller/dwc/pcie-designware.h

@@ -485,8 +485,6 @@ struct dw_pcie_ops {
 	enum dw_pcie_ltssm (*get_ltssm)(struct dw_pcie *pcie);
 	int	(*start_link)(struct dw_pcie *pcie);
 	void	(*stop_link)(struct dw_pcie *pcie);
-	int	(*host_start_link)(struct dw_pcie *pcie);
-	void	(*host_stop_link)(struct dw_pcie *pcie);
 };
 
 struct debugfs_info {
@@ -789,20 +787,6 @@ static inline void dw_pcie_stop_link(struct dw_pcie *pci)
 		pci->ops->stop_link(pci);
 }
 
-static inline int dw_pcie_host_start_link(struct dw_pcie *pci)
-{
-	if (pci->ops && pci->ops->host_start_link)
-		return pci->ops->host_start_link(pci);
-
-	return 0;
-}
-
-static inline void dw_pcie_host_stop_link(struct dw_pcie *pci)
-{
-	if (pci->ops && pci->ops->host_stop_link)
-		pci->ops->host_stop_link(pci);
-}
-
 static inline enum dw_pcie_ltssm dw_pcie_get_ltssm(struct dw_pcie *pci)
 {
 	u32 val;

drivers/pci/controller/dwc/pcie-qcom.c

@@ -24,6 +24,7 @@
 #include <linux/of_pci.h>
 #include <linux/pci.h>
 #include <linux/pci-ecam.h>
+#include <linux/pci-pwrctrl.h>
 #include <linux/pm_opp.h>
 #include <linux/pm_runtime.h>
 #include <linux/platform_device.h>
@@ -250,7 +251,6 @@ struct qcom_pcie_ops {
 	void (*host_post_init)(struct qcom_pcie *pcie);
 	void (*deinit)(struct qcom_pcie *pcie);
 	void (*ltssm_enable)(struct qcom_pcie *pcie);
-	void (*ltssm_disable)(struct qcom_pcie *pcie);
 	int (*config_sid)(struct qcom_pcie *pcie);
 };
 
@@ -290,7 +290,7 @@ struct qcom_pcie {
 
 #define to_qcom_pcie(x)		dev_get_drvdata((x)->dev)
 
-static void qcom_perst_assert(struct qcom_pcie *pcie, bool assert)
+static void __qcom_pcie_perst_assert(struct qcom_pcie *pcie, bool assert)
 {
 	struct qcom_pcie_port *port;
 	int val = assert ? 1 : 0;
@@ -301,16 +301,16 @@ static void qcom_perst_assert(struct qcom_pcie *pcie, bool assert)
 	usleep_range(PERST_DELAY_US, PERST_DELAY_US + 500);
 }
 
-static void qcom_ep_reset_assert(struct qcom_pcie *pcie)
+static void qcom_pcie_perst_assert(struct qcom_pcie *pcie)
 {
-	qcom_perst_assert(pcie, true);
+	__qcom_pcie_perst_assert(pcie, true);
 }
 
-static void qcom_ep_reset_deassert(struct qcom_pcie *pcie)
+static void qcom_pcie_perst_deassert(struct qcom_pcie *pcie)
 {
 	/* Ensure that PERST has been asserted for at least 100 ms */
 	msleep(PCIE_T_PVPERL_MS);
-	qcom_perst_assert(pcie, false);
+	__qcom_pcie_perst_assert(pcie, false);
 }
 
 static int qcom_pcie_start_link(struct dw_pcie *pci)
@@ -642,37 +642,6 @@ static int qcom_pcie_post_init_1_0_0(struct qcom_pcie *pcie)
 	return 0;
 }
 
-static int qcom_pcie_host_start_link(struct dw_pcie *pci)
-{
-	struct qcom_pcie *pcie = to_qcom_pcie(pci);
-
-	qcom_ep_reset_deassert(pcie);
-
-	if (pcie->cfg->ops->ltssm_enable)
-		pcie->cfg->ops->ltssm_enable(pcie);
-
-	return 0;
-}
-
-static void qcom_pcie_host_stop_link(struct dw_pcie *pci)
-{
-	struct qcom_pcie *pcie = to_qcom_pcie(pci);
-
-	qcom_ep_reset_assert(pcie);
-
-	if (pcie->cfg->ops->ltssm_disable)
-		pcie->cfg->ops->ltssm_disable(pcie);
-}
-
-static void qcom_pcie_2_3_2_ltssm_disable(struct qcom_pcie *pcie)
-{
-	u32 val;
-
-	val = readl(pcie->parf + PARF_LTSSM);
-	val &= ~LTSSM_EN;
-	writel(val, pcie->parf + PARF_LTSSM);
-}
-
 static void qcom_pcie_2_3_2_ltssm_enable(struct qcom_pcie *pcie)
 {
 	u32 val;
@@ -1318,7 +1287,7 @@ static int qcom_pcie_host_init(struct dw_pcie_rp *pp)
 	struct qcom_pcie *pcie = to_qcom_pcie(pci);
 	int ret;
 
-	qcom_ep_reset_assert(pcie);
+	qcom_pcie_perst_assert(pcie);
 
 	ret = pcie->cfg->ops->init(pcie);
 	if (ret)
@@ -1328,13 +1297,21 @@ static int qcom_pcie_host_init(struct dw_pcie_rp *pp)
 	if (ret)
 		goto err_deinit;
 
+	ret = pci_pwrctrl_create_devices(pci->dev);
+	if (ret)
+		goto err_disable_phy;
+
+	ret = pci_pwrctrl_power_on_devices(pci->dev);
+	if (ret)
+		goto err_pwrctrl_destroy;
+
 	if (pcie->cfg->ops->post_init) {
 		ret = pcie->cfg->ops->post_init(pcie);
 		if (ret)
-			goto err_disable_phy;
+			goto err_pwrctrl_power_off;
 	}
 
-	qcom_ep_reset_deassert(pcie);
+	qcom_pcie_perst_deassert(pcie);
 
 	if (pcie->cfg->ops->config_sid) {
 		ret = pcie->cfg->ops->config_sid(pcie);
@@ -1345,7 +1322,12 @@ static int qcom_pcie_host_init(struct dw_pcie_rp *pp)
 	return 0;
 
 err_assert_reset:
-	qcom_ep_reset_assert(pcie);
+	qcom_pcie_perst_assert(pcie);
+err_pwrctrl_power_off:
+	pci_pwrctrl_power_off_devices(pci->dev);
+err_pwrctrl_destroy:
+	if (ret != -EPROBE_DEFER)
+		pci_pwrctrl_destroy_devices(pci->dev);
 err_disable_phy:
 	qcom_pcie_phy_power_off(pcie);
 err_deinit:
@@ -1359,7 +1341,13 @@ static void qcom_pcie_host_deinit(struct dw_pcie_rp *pp)
 	struct dw_pcie *pci = to_dw_pcie_from_pp(pp);
 	struct qcom_pcie *pcie = to_qcom_pcie(pci);
 
-	qcom_ep_reset_assert(pcie);
+	qcom_pcie_perst_assert(pcie);
+
+	/*
+	 * No need to destroy pwrctrl devices as this function only gets called
+	 * during system suspend as of now.
+	 */
+	pci_pwrctrl_power_off_devices(pci->dev);
 	qcom_pcie_phy_power_off(pcie);
 	pcie->cfg->ops->deinit(pcie);
 }
@@ -1441,7 +1429,6 @@ static const struct qcom_pcie_ops ops_1_9_0 = {
 	.host_post_init = qcom_pcie_host_post_init_2_7_0,
 	.deinit = qcom_pcie_deinit_2_7_0,
 	.ltssm_enable = qcom_pcie_2_3_2_ltssm_enable,
-	.ltssm_disable = qcom_pcie_2_3_2_ltssm_disable,
 	.config_sid = qcom_pcie_config_sid_1_9_0,
 };
 
@@ -1513,8 +1500,6 @@ static const struct qcom_pcie_cfg cfg_fw_managed = {
 static const struct dw_pcie_ops dw_pcie_ops = {
 	.link_up = qcom_pcie_link_up,
 	.start_link = qcom_pcie_start_link,
-	.host_start_link = qcom_pcie_host_start_link,
-	.host_stop_link = qcom_pcie_host_stop_link,
 };
 
 static int qcom_pcie_icc_init(struct qcom_pcie *pcie)
@@ -1968,7 +1953,7 @@ static int qcom_pcie_probe(struct platform_device *pdev)
 
 	ret = dw_pcie_host_init(pp);
 	if (ret) {
-		dev_err(dev, "cannot initialize host\n");
+		dev_err_probe(dev, ret, "cannot initialize host\n");
 		goto err_phy_exit;
 	}
 

drivers/pci/hotplug/pciehp.h

@@ -186,6 +186,7 @@ int pciehp_query_power_fault(struct controller *ctrl);
 int pciehp_card_present(struct controller *ctrl);
 int pciehp_card_present_or_link_active(struct controller *ctrl);
 int pciehp_check_link_status(struct controller *ctrl);
+int pciehp_check_link_active(struct controller *ctrl);
 bool pciehp_device_replaced(struct controller *ctrl);
 void pciehp_release_ctrl(struct controller *ctrl);
 

drivers/pci/hotplug/pciehp_ctrl.c

@@ -260,7 +260,7 @@ void pciehp_handle_presence_or_link_change(struct controller *ctrl, u32 events)
 	/* Turn the slot on if it's occupied or link is up */
 	mutex_lock(&ctrl->state_lock);
 	present = pciehp_card_present(ctrl);
-	link_active = pcie_link_is_active(ctrl->pcie->port);
+	link_active = pciehp_check_link_active(ctrl);
 	if (present <= 0 && link_active <= 0) {
 		if (ctrl->state == BLINKINGON_STATE) {
 			ctrl->state = OFF_STATE;