media: iris: add context bank support via iommu-map for lemans and hamoa#452
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gouravk-qualcomm wants to merge 7 commits intoqualcomm-linux:qcom-6.18.yfrom
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media: iris: add context bank support via iommu-map for lemans and hamoa#452gouravk-qualcomm wants to merge 7 commits intoqualcomm-linux:qcom-6.18.yfrom
gouravk-qualcomm wants to merge 7 commits intoqualcomm-linux:qcom-6.18.yfrom
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vgarodia
approved these changes
Apr 10, 2026
Product requirement warranting exception. Approved. |
shashim-quic
approved these changes
Apr 11, 2026
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Test Matrix
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sgaud-quic
requested changes
Apr 11, 2026
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sgaud-quic
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As dependency PR is merged, please rebase the PR on tip.
Also check one of the test case (irg) is failing on RB8 device :
https://lava-oss.qualcomm.com/scheduler/job/71633#results_4207
+ /lava-71633/0/tests/0_qcom-next-ci-premerge-tests/Runner/suites/Kernel/Baseport/irq/run.sh
[INFO] 2026-04-11 08:33:21 - -----------------------------------------------------------------------------------------
[INFO] 2026-04-11 08:33:21 - -------------------Starting irq Testcase----------------------------
[INFO] 2026-04-11 08:33:21 - === Test Initialization ===
[INFO] 2026-04-11 08:33:21 - Initial timer count:
[INFO] 2026-04-11 08:33:21 - 11: 4239 4405 4949 3403 2198 3291 3063 2286 GICv3 27 Level arch_timer
[INFO] 2026-04-11 08:33:41 - Timer count after 20 secs:
[INFO] 2026-04-11 08:33:41 - 11: 4357 4409 5245 3411 2198 3298 3436 2293 GICv3 27 Level arch_timer
[INFO] 2026-04-11 08:33:41 - Comparing timer counts:
[INFO] 2026-04-11 08:33:41 - Detected timer counters: initial=8 final=8
[PASS] 2026-04-11 08:33:41 - CPU 0: Timer count has incremented. Test PASSED
[PASS] 2026-04-11 08:33:41 - CPU 1: Timer count has incremented. Test PASSED
[PASS] 2026-04-11 08:33:41 - CPU 2: Timer count has incremented. Test PASSED
[PASS] 2026-04-11 08:33:41 - CPU 3: Timer count has incremented. Test PASSED
[FAIL] 2026-04-11 08:33:41 - CPU 4: Timer count has not incremented. Test FAILED
[PASS] 2026-04-11 08:33:41 - CPU 5: Timer count has incremented. Test PASSED
[PASS] 2026-04-11 08:33:41 - CPU 6: Timer count has incremented. Test PASSED
[PASS] 2026-04-11 08:33:41 - CPU 7: Timer count has incremented. Test PASSED
+ true
+ /lava-71633/0/tests/0_qcom-next-ci-premerge-tests/Runner/utils/send-to-lava.sh /lava-71633/0/tests/0_qcom-next-ci-premerge-tests/Runner/suites/Kernel/Baseport/irq/irq.res
<<<LAVA_SIGNAL_TESTCASE TEST_CASE_ID=irq RESULT=FAIL>>>
Wire up sm8550_init_cb_devs() in iris_platform_gen2.c to register the two child context-bank devices (iris_non_pixel and iris_pixel) using iris_create_cb_dev(), and hook it into the sm8550_data platform data via the .init_cb_devs callback. Signed-off-by: Vishnu Reddy <busanna.reddy@oss.qualcomm.com> Signed-off-by: Vikash Garodia <vikash.garodia@oss.qualcomm.com> Signed-off-by: Gourav Kumar <gouravk@qti.qualcomm.com>
Different stream IDs from VPU would be associated to one of these CB. Multiple CBs are needed to increase the IOVA for the video usecases like higher concurrent sessions. Co-developed-by: Vishnu Reddy <busanna.reddy@oss.qualcomm.com> Signed-off-by: Vishnu Reddy <busanna.reddy@oss.qualcomm.com> Signed-off-by: Vikash Garodia <vikash.garodia@oss.qualcomm.com>
Depending on the buffer type (input, output and internal), associated context bank is selected, if available. Fallback to parent device for backward compatibility. Co-developed-by: Vishnu Reddy <busanna.reddy@oss.qualcomm.com> Signed-off-by: Vishnu Reddy <busanna.reddy@oss.qualcomm.com> Signed-off-by: Vikash Garodia <vikash.garodia@oss.qualcomm.com>
…ion IDs Add a dt-bindings header include/dt-bindings/media/qcom,sm8550-iris.h defining IRIS_NON_PIXEL_VCODEC (0) and IRIS_PIXEL (1) function IDs used to identify the non-pixel and pixel context bank SMMU stream mappings via iommu-map. Signed-off-by: Vishnu Reddy <busanna.reddy@oss.qualcomm.com> Signed-off-by: Vikash Garodia <vikash.garodia@oss.qualcomm.com> Signed-off-by: Gourav Kumar <gouravk@qti.qualcomm.com>
Switch the iris video codec node in sa8775p (lemans) from the legacy 'iommus' property to 'iommu-map', using IRIS_NON_PIXEL_VCODEC and IRIS_PIXEL function IDs to identify the non-pixel and pixel context bank SMMU stream mappings respectively. Signed-off-by: Vishnu Reddy <busanna.reddy@oss.qualcomm.com> Signed-off-by: Vikash Garodia <vikash.garodia@oss.qualcomm.com> Signed-off-by: Gourav Kumar <gouravk@qti.qualcomm.com>
As per memory map, video firmware memory region is 7MB for sa8775* variants while it is 16MB for qcs9100* variants. Keeping the 7MB variant of video firmware in ride common DTS does not allow qcs9100* to pick the 16MB variant. Drop it from common and define in respective variant DTS. Signed-off-by: Gourav Kumar <gouravk@qti.qualcomm.com> Signed-off-by: Vikash Garodia <vikash.garodia@oss.qualcomm.com> Signed-off-by: Venkata Siva Pavan KumarVenkatapatigari <venvenk@qti.qualcomm.com>
Switch the iris video codec node in hamoa from the legacy 'iommus' property to 'iommu-map', using IRIS_NON_PIXEL_VCODEC and IRIS_PIXEL function IDs to identify the non-pixel and pixel context bank SMMU stream mappings respectively. Signed-off-by: Vishnu Reddy <busanna.reddy@oss.qualcomm.com> Signed-off-by: Vikash Garodia <vikash.garodia@oss.qualcomm.com> Signed-off-by: Gourav Kumar <gouravk@qti.qualcomm.com>
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@sgaud-quic Done, rebased cleanly on the latest tip. |
Author
@shashim-quic Please re-approve. |
Test Matrix
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This series adds context bank support to the Qualcomm iris video codec driver
by migrating from the legacy 'iommus' DT property to 'iommu-map', enabling
per-context-bank IOMMU domain management across multiple platforms.
Driver changes (media: iris):
DT changes (arm64: dts: qcom):
IRIS_NON_PIXEL_VCODEC and IRIS_PIXEL function IDs
and IRIS_PIXEL function IDs
Exception JIRA: https://jira-dc.qualcomm.com/jira/browse/QLIJIRA-115
CRs-Fixed: 4496236
Depends-on: #445