Add new proprieties and wrappers functions#142
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tmarcero
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May 13, 2026
- CortexR52: Add new pmsav8r_hdregion property
- Update set_cp15_cbar wrapper function
- Add new wrappers functions and export them with getter functions
- Add new wrapper function to set IMP_BUILDOPTR register
- qct-qtimer: add ticker-ctrl property and remove the start-ticking one (OnOffAuto)
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- Add a new property to set the PMSAv8 MPU EL2 region, according to sail the number of supported hyp regions is by default 24. Signed-off-by: Marceron Thomas <tmarcero@qti.qualcomm.com>
- According to the file helper.c of qemu, there are 2 ways of setting CBAR. The first one is if ARM_FEATURE_V8, nothing special here, just set `cpu->reset_cbar` and the function `register_cp_regs_for_features` in helper.c will do the job. The second ways is if cpu is NOT ARM_FEATURE_V8, the ARM register used is IMP_TESTR0, to set the value we need to use `cpu->reset_cbar` but the info `.fieldoffset` is defined and the value is stored in cp15.c15_config_base_address. This ARM register has acces PL3_W, it means that it can modify the CBAR, so this `.fieldoffset` allow to store it in the CPU's state structureO Signed-off-by: Marceron Thomas <tmarcero@qti.qualcomm.com>
- Export getter functions - Add new wrappers functions for ARM power control, which allow to power ON/OFF the ARMs CPUs Signed-off-by: Marceron Thomas <tmarcero@qti.qualcomm.com>
- Add new wrapper function to set IMP_BUILDOPTR register which is available only for Cortex-R52. This register allow to configure the processor (Check technical reference of Cortex-R52 for more details) Signed-off-by: Marceron Thomas <tmarcero@qti.qualcomm.com>
… (OnOffAuto)
hw/timer/qct-qtimer: implement full ON_OFF_AUTO semantics for ticker-ctrl
The purpose of this commit is if ticker_ctlr is ON/OFF, do not
run or stop the Qtimer.
- on: ptimers are started unconditionally at realize time and cannot
be stopped by SW writes to CNTP_CTL, CNTP_CVAL_LO or CNTP_TVAL.
Useful for free-running counter use cases where the counter must
always tick.
- off: ptimers are never started, regardless of SW writes to CNTP_CTL,
CNTP_CVAL_LO or CNTP_TVAL. The CNTP_CTL ENABLE bit is stored but
ignored for ptimer control. Useful when the QTimer block is
present in the platform but must remain inactive.
- auto: (default) ptimers are controlled entirely by SW via the CNTP_CTL
ENABLE bit, matching standard ARMv8 generic timer semantics.
Let's remove the start-ticking because it's inapropriate name now.
Signed-off-by: Marceron Thomas <tmarcero@qti.qualcomm.com>
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androm3da
approved these changes
May 19, 2026
markfoodyburton
approved these changes
May 19, 2026
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