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130 | 130 | //! |
131 | 131 | //! * PowerPC and MIPS platforms with 32-bit pointers do not have `AtomicU64` or |
132 | 132 | //! `AtomicI64` types. |
133 | | -//! * ARM platforms like `armv5te` that aren't for Linux only provide `load` |
134 | | -//! and `store` operations, and do not support Compare and Swap (CAS) |
135 | | -//! operations, such as `swap`, `fetch_add`, etc. Additionally on Linux, |
136 | | -//! these CAS operations are implemented via [operating system support], which |
137 | | -//! may come with a performance penalty. |
138 | | -//! * ARM targets with `thumbv6m` only provide `load` and `store` operations, |
139 | | -//! and do not support Compare and Swap (CAS) operations, such as `swap`, |
140 | | -//! `fetch_add`, etc. |
| 133 | +//! * Legacy ARM platforms like ARMv4T and ARMv5TE have very limited hardware |
| 134 | +//! support for atomics. The bare-metal targets disable this module |
| 135 | +//! entirely, but the Linux targets [use the kernel] to assist (which comes |
| 136 | +//! with a performance penalty). It's not until ARMv6K onwards that ARM CPUs |
| 137 | +//! have support for load/store and Compare and Swap (CAS) atomics in hardware. |
| 138 | +//! * ARMv6-M and ARMv8-M baseline targets (`thumbv6m-*` and |
| 139 | +//! `thumbv8m.base-*`) only provide `load` and `store` operations, and do |
| 140 | +//! not support Compare and Swap (CAS) operations, such as `swap`, |
| 141 | +//! `fetch_add`, etc. Full CAS support is available on ARMv7-M and ARMv8-M |
| 142 | +//! Mainline (`thumbv7m-*`, `thumbv7em*` and `thumbv8m.main-*`). |
141 | 143 | //! |
142 | | -//! [operating system support]: https://www.kernel.org/doc/Documentation/arm/kernel_user_helpers.txt |
| 144 | +//! [use the kernel]: https://www.kernel.org/doc/Documentation/arm/kernel_user_helpers.txt |
143 | 145 | //! |
144 | 146 | //! Note that future platforms may be added that also do not have support for |
145 | 147 | //! some atomic operations. Maximally portable code will want to be careful |
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