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2 changes: 1 addition & 1 deletion ci/intrinsic-test.sh
Original file line number Diff line number Diff line change
Expand Up @@ -56,7 +56,7 @@ case ${TARGET} in

aarch64_be-unknown-linux-gnu*)
TEST_CPPFLAGS="-fuse-ld=lld"
TEST_SKIP_INTRINSICS=crates/intrinsic-test/missing_aarch64.txt
TEST_SKIP_INTRINSICS=crates/intrinsic-test/missing_aarch64_be.txt
TEST_CXX_COMPILER="clang++"
TEST_RUNNER="${CARGO_TARGET_AARCH64_BE_UNKNOWN_LINUX_GNU_RUNNER}"
: "${TEST_SAMPLE_INTRINSICS_PERCENTAGE:=100}"
Expand Down
24 changes: 12 additions & 12 deletions crates/core_arch/src/aarch64/neon/generated.rs
Original file line number Diff line number Diff line change
Expand Up @@ -9500,10 +9500,10 @@ pub fn vdivh_f16(a: f16, b: f16) -> f16 {
#[unstable(feature = "stdarch_neon_dotprod", issue = "117224")]
pub fn vdot_laneq_s32<const LANE: i32>(a: int32x2_t, b: int8x8_t, c: int8x16_t) -> int32x2_t {
static_assert_uimm_bits!(LANE, 2);
let c: int32x4_t = vreinterpretq_s32_s8(c);
unsafe {
let c: int32x4_t = transmute(c);
let c: int32x2_t = simd_shuffle!(c, c, [LANE as u32, LANE as u32]);
vdot_s32(a, b, transmute(c))
vdot_s32(a, b, vreinterpret_s8_s32(c))
}
}
#[doc = "Dot product arithmetic (indexed)"]
Expand All @@ -9515,11 +9515,11 @@ pub fn vdot_laneq_s32<const LANE: i32>(a: int32x2_t, b: int8x8_t, c: int8x16_t)
#[unstable(feature = "stdarch_neon_dotprod", issue = "117224")]
pub fn vdotq_laneq_s32<const LANE: i32>(a: int32x4_t, b: int8x16_t, c: int8x16_t) -> int32x4_t {
static_assert_uimm_bits!(LANE, 2);
let c: int32x4_t = vreinterpretq_s32_s8(c);
unsafe {
let c: int32x4_t = transmute(c);
let c: int32x4_t =
simd_shuffle!(c, c, [LANE as u32, LANE as u32, LANE as u32, LANE as u32]);
vdotq_s32(a, b, transmute(c))
vdotq_s32(a, b, vreinterpretq_s8_s32(c))
}
}
#[doc = "Dot product arithmetic (indexed)"]
Expand All @@ -9531,10 +9531,10 @@ pub fn vdotq_laneq_s32<const LANE: i32>(a: int32x4_t, b: int8x16_t, c: int8x16_t
#[unstable(feature = "stdarch_neon_dotprod", issue = "117224")]
pub fn vdot_laneq_u32<const LANE: i32>(a: uint32x2_t, b: uint8x8_t, c: uint8x16_t) -> uint32x2_t {
static_assert_uimm_bits!(LANE, 2);
let c: uint32x4_t = vreinterpretq_u32_u8(c);
unsafe {
let c: uint32x4_t = transmute(c);
let c: uint32x2_t = simd_shuffle!(c, c, [LANE as u32, LANE as u32]);
vdot_u32(a, b, transmute(c))
vdot_u32(a, b, vreinterpret_u8_u32(c))
}
}
#[doc = "Dot product arithmetic (indexed)"]
Expand All @@ -9546,11 +9546,11 @@ pub fn vdot_laneq_u32<const LANE: i32>(a: uint32x2_t, b: uint8x8_t, c: uint8x16_
#[unstable(feature = "stdarch_neon_dotprod", issue = "117224")]
pub fn vdotq_laneq_u32<const LANE: i32>(a: uint32x4_t, b: uint8x16_t, c: uint8x16_t) -> uint32x4_t {
static_assert_uimm_bits!(LANE, 2);
let c: uint32x4_t = vreinterpretq_u32_u8(c);
unsafe {
let c: uint32x4_t = transmute(c);
let c: uint32x4_t =
simd_shuffle!(c, c, [LANE as u32, LANE as u32, LANE as u32, LANE as u32]);
vdotq_u32(a, b, transmute(c))
vdotq_u32(a, b, vreinterpretq_u8_u32(c))
}
}
#[doc = "Set all vector lanes to the same value"]
Expand Down Expand Up @@ -28283,10 +28283,10 @@ pub fn vuqadds_s32(a: i32, b: u32) -> i32 {
#[unstable(feature = "stdarch_neon_i8mm", issue = "117223")]
pub fn vusdot_laneq_s32<const LANE: i32>(a: int32x2_t, b: uint8x8_t, c: int8x16_t) -> int32x2_t {
static_assert_uimm_bits!(LANE, 2);
let c: int32x4_t = vreinterpretq_s32_s8(c);
unsafe {
let c: int32x4_t = transmute(c);
let c: int32x2_t = simd_shuffle!(c, c, [LANE as u32, LANE as u32]);
vusdot_s32(a, b, transmute(c))
vusdot_s32(a, b, vreinterpret_s8_s32(c))
}
}
#[doc = "Dot product index form with unsigned and signed integers"]
Expand All @@ -28298,11 +28298,11 @@ pub fn vusdot_laneq_s32<const LANE: i32>(a: int32x2_t, b: uint8x8_t, c: int8x16_
#[unstable(feature = "stdarch_neon_i8mm", issue = "117223")]
pub fn vusdotq_laneq_s32<const LANE: i32>(a: int32x4_t, b: uint8x16_t, c: int8x16_t) -> int32x4_t {
static_assert_uimm_bits!(LANE, 2);
let c: int32x4_t = vreinterpretq_s32_s8(c);
unsafe {
let c: int32x4_t = transmute(c);
let c: int32x4_t =
simd_shuffle!(c, c, [LANE as u32, LANE as u32, LANE as u32, LANE as u32]);
vusdotq_s32(a, b, transmute(c))
vusdotq_s32(a, b, vreinterpretq_s8_s32(c))
}
}
#[doc = "Unzip vectors"]
Expand Down
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