Harden ARM64 AHCI exec reads against signal interruption#405
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Root cause under relaxed ARM64 init ordering was a submitted AHCI read returning EINTR when SIGCHLD arrived during exec. The driver then cleared port ownership while slot 0 could still be in flight, making the next exec read race the old command/DMA lifecycle.\n\nAdd an explicit uninterruptible completion wait for already-issued hardware commands and use it for AHCI slot-0 waits. Relax the ARM64 init serialization workaround so bsshd starts before the boot service wave and the per-service sleeps are gone.\n\nCo-authored-by: Ryan Breen <ryan@ryanbreen.com>\nCo-authored-by: Claude Code <noreply@anthropic.com>
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Summary
Evidence
AHCI: interruptedimmediately after xhci_counters exited/SIGCHLD arrived.turn336-artifacts/relaxed-prefix.serial.loglines 425-428turn336-artifacts/fixed-relaxed.serial.loglines 381-487turn336-artifacts/fixed-relaxed-live.serial.logturn336-artifacts/fixed-relaxed-live.screenshot.pngshows Bounce on the BWM desktop./run.sh --parallels --test 70produced no compile-stage warning/error lines viagrep -E "^(warning|error)" turn336-artifacts/fixed-relaxed-run.log.AHCI: interrupted, AHCI timeout, panic, lockup, SCHED_RESCUE, or VIRTGPU_FAIL in fixed serial logs.Notes
cargo fmtis blocked by pre-existing trailing whitespace intests/shared_qemu.rs; the touched files were formatted directly withrustfmt.Fixes breenix-4yu