This mini project demonstrates how ML-style risk scoring can prioritize digital verification effort in semiconductor design.
This repository is designed to run in restricted environments, so the implementation uses only Python's standard library (no pip install required).
- Generates synthetic verification-run records with realistic inputs:
- block type
- changed lines
- toggling activity
- lint warnings
- CDC violations
- timing slack
- coverage delta
- engineer experience
- Computes a logistic risk score for verification failure probability.
- Prints confusion-matrix style metrics and summary quality scores.
- Exports a ranked CSV report (
verification_risk_report.csv) for triage.
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Open a terminal and go to the project folder:
cd /workspace/Mini-project- -
Check Python is available (Python 3.9+ recommended):
python3 --version
-
Run the script:
python3 ml_digital_verification_semiconductor.py
-
Review console output:
- Confusion matrix (TP/FP/FN/TN)
- Accuracy, precision, recall, F1
- Top 5 highest-risk verification runs
-
Open generated report:
cat verification_risk_report.csv
(or open it in Excel/Google Sheets for easier sorting/filtering)
python3 ml_digital_verification_semiconductor.py- Console metrics (accuracy, precision, recall, F1).
- Top highest-risk verification runs.
- CSV output sorted by risk for downstream review.