migrate shift opcode

ceno_zkvm/src/instructions/riscv/insn_base.rs

@@ -506,7 +506,6 @@ impl<E: ExtensionField> MemAddr<E> {
         // Range check the high limb.
         for i in 1..UINT_LIMBS {
             let high_u16 = (addr >> (i * 16)) & 0xffff;
-            println!("assignment max bit {}", (self.max_bits - i * 16).min(16));
             lkm.assert_ux_v2(high_u16 as u64, (self.max_bits - i * 16).min(16));
         }
 

ceno_zkvm/src/instructions/riscv/rv32im.rs

@@ -6,7 +6,6 @@ use super::{
 use crate::instructions::riscv::auipc::AuipcInstruction;
 #[cfg(feature = "u16limb_circuit")]
 use crate::instructions::riscv::lui::LuiInstruction;
-
 use crate::{
     error::ZKVMError,
     instructions::{