DEV-7522: marvell10g_ptp configure MAC frame size (MRU) for jumbo packets#43
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adrian-nicolau merged 3 commits intoAug 6, 2025
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shmuelhazan
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Pull Request Overview
This PR configures MAC frame size (MRU - Maximum Receive Unit) for jumbo packets in the marvell10g_ptp driver. The implementation dynamically adjusts MRU settings based on operational speed, with separate register configurations for 1G/2.5G mode and XG mode.
- Added MRU control register definitions and speed-dependent configuration logic
- Implemented
mv3310_ptp_update()function to handle speed changes during link events - Added optimization to avoid unnecessary MRU reconfigurations when speed remains in the same class
Reviewed Changes
Copilot reviewed 2 out of 2 changed files in this pull request and generated 3 comments.
| File | Description |
|---|---|
| drivers/net/phy/marvell10g_ptp.c | Added MRU register definitions, speed tracking, and MRU configuration function |
| drivers/net/phy/marvell10g.c | Added call to update PTP configuration on link status changes |
shmuelhazan
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Aug 6, 2025
|
@adrian-nicolau Let's merge this as-is and ask V&V to validate. Worse-case -- we will have another fix. |
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…kets (#43) ## Description Configure MRU size depending on the operational speed. According to docs: _1G mode and 2.5G mode are sharing same set of configuration. XG mode and 1/2.5 G mode have separate configuration register but enable only one group during operation. Therefore two register group act as one after operation speed is determined_ ## Tests - In XG mode, no link, registers have correct value - IN 1G mode, link, registers have correct value | Mode|Register|Value| |-------|---------|------| | XG|0x8c02 0x8e02|0x1FFF| |1G|0x8c00 0x8e00|0xFFFD|
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…kets (#43) ## Description Configure MRU size depending on the operational speed. According to docs: _1G mode and 2.5G mode are sharing same set of configuration. XG mode and 1/2.5 G mode have separate configuration register but enable only one group during operation. Therefore two register group act as one after operation speed is determined_ ## Tests - In XG mode, no link, registers have correct value - IN 1G mode, link, registers have correct value | Mode|Register|Value| |-------|---------|------| | XG|0x8c02 0x8e02|0x1FFF| |1G|0x8c00 0x8e00|0xFFFD|
shmuelhazan
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Nov 6, 2025
…kets (#43) ## Description Configure MRU size depending on the operational speed. According to docs: _1G mode and 2.5G mode are sharing same set of configuration. XG mode and 1/2.5 G mode have separate configuration register but enable only one group during operation. Therefore two register group act as one after operation speed is determined_ ## Tests - In XG mode, no link, registers have correct value - IN 1G mode, link, registers have correct value | Mode|Register|Value| |-------|---------|------| | XG|0x8c02 0x8e02|0x1FFF| |1G|0x8c00 0x8e00|0xFFFD|
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Nov 13, 2025
…kets (#43) ## Description Configure MRU size depending on the operational speed. According to docs: _1G mode and 2.5G mode are sharing same set of configuration. XG mode and 1/2.5 G mode have separate configuration register but enable only one group during operation. Therefore two register group act as one after operation speed is determined_ ## Tests - In XG mode, no link, registers have correct value - IN 1G mode, link, registers have correct value | Mode|Register|Value| |-------|---------|------| | XG|0x8c02 0x8e02|0x1FFF| |1G|0x8c00 0x8e00|0xFFFD|
adrian-nicolau
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Nov 28, 2025
…kets (#43) ## Description Configure MRU size depending on the operational speed. According to docs: _1G mode and 2.5G mode are sharing same set of configuration. XG mode and 1/2.5 G mode have separate configuration register but enable only one group during operation. Therefore two register group act as one after operation speed is determined_ ## Tests - In XG mode, no link, registers have correct value - IN 1G mode, link, registers have correct value | Mode|Register|Value| |-------|---------|------| | XG|0x8c02 0x8e02|0x1FFF| |1G|0x8c00 0x8e00|0xFFFD|
adrian-nicolau
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Dec 1, 2025
…kets (#43) ## Description Configure MRU size depending on the operational speed. According to docs: _1G mode and 2.5G mode are sharing same set of configuration. XG mode and 1/2.5 G mode have separate configuration register but enable only one group during operation. Therefore two register group act as one after operation speed is determined_ ## Tests - In XG mode, no link, registers have correct value - IN 1G mode, link, registers have correct value | Mode|Register|Value| |-------|---------|------| | XG|0x8c02 0x8e02|0x1FFF| |1G|0x8c00 0x8e00|0xFFFD|
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Description
Configure MRU size depending on the operational speed. According to docs:
1G mode and 2.5G mode are sharing same set of configuration. XG mode and 1/2.5 G mode have
separate configuration register but enable only one group during operation. Therefore two register
group act as one after operation speed is determined
Tests