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Shuttler

16-ch, 125 MSPS DAC in FMC form factor

Design files (schematics, PCB layouts, BOMs) can be found at Shuttler/releases.

Overview

Shuttler is a medium-speed DAC card targeted for ion trap "dc" electrode applications. Design goals are as follows:

• High dc resolution (~18 bits) for trap electrode bias.
• ~15 MHz analog bandwidth to enable fast ion transport and parametric well modulation. Lower bit depth allowable for higher-bandwidth signals, based on noise/distortion of DAC/amplifiers in this bandwidth - ~14 bits is appropriate.
• Enough channels in single rack-mount unit to run an ion trap with state-of-the-art electrode count (~200 electrodes).

Draft target specs:

• AD9117 DACs @ 125 MSPS
• Resolution above 14 bits to be accomplished with dithering or sigma-delta modulation
• FMC mezzanine card
• 16 channels per card
• Differential analog output (+/-5 V differential) via COTS connector with shielded impedance-matched pairs (mini-SAS HD)

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