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Minutes20161014
Robert Jordens edited this page Oct 9, 2017
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present: @gkasprow, @sbourdeauducq, @dhslichter, @jordens, @jmizrahi, @jbqubit
minutes: @jbqubit
JESD204B waveform demo update provided by @jordens https://github.com/m-labs/artiq/issues/580
- some bugs remain, 95% done
- @jbqubit will test at UMD
NIST Servo Box and ARTIQ update by @dhslichter
- relates to this https://github.com/nist-ionstorage/digital-servo
- no current plans for SPI control of the lock box
- Ion Storage has a rudimentary NDSP but not ready for export back to ARTIQ
- does m-labs have a tracking system for keeping tabs on external groups that might have contributions to make back to ARTIQ? @jordens
Sayma LO mezzanine Idea proposed by @hartytp on 10/14 https://github.com/m-labs/sayma/issues/8
- conclusion of those present on call: no separate LO mezzanine
- common use case is high-frequency LO
- this LO should be generated on low-loss analog mezzanine
- @hartytp please comment
Sayma clock mezzanine signal/power @hartytp https://github.com/m-labs/sayma/issues/23
- generate clock-specific voltages on mezzanine using LDO
- conclusion: use same 30-pin header and power as analog mezzanine
100 MHz distribution discussion
- crated new Issue #27
- use LVPECL for faster edges, unclear if its also lower phase noise
- use passive or active clock distribution?
- @jordens suggests use of LTC6957 for LVPECL driver
power discussion led by @gkasprow
- Sayma FPGA power needs to be generated somewhere, added to #22
- @jordens points out that AD9154 needs DVDD12, CVDD12, PVDD12 = 1.3 V ± 2% to max out the spec; note this variation from usual 1.2V spec
- make new Issue consolidating power requirements for various ICs
- voltage, current, low noise or not
- is this a job for michalgaska2@gmail.com?
- full planning of power will happen during simulation stage
- do we want hot-swap capability?
- AMC handle contains micro-switch that works with MMC to kill power to board
- decision: we want safe hot-swapping for both Sayma AMC and Sayma RTM
- MMC will control two LEDs on AMC front panel
WUT and m-labs coordination on PCB testing
- make Issue on this
- WUT will
- choose development board
- learn to port ARTIQ to it
- WUT needs
- example of how to use ARTIQ for I2C
- example of how to use ARTIQ for SPI
- FPGA lead at WUT is Wojciech Zabolotny, wzab01@gmail.com, wzab
- schedule discussion with WUT
sensor readout
- reminder of past discussion: MMC is domain of WUT; MMC will be used to make crude temperature measurements of boards (I2C LM75); servo crate fans; protect against overheat
- how are sensors readout by FPGA?
- I2C multiplexor permits either AMC FPGA or MMC to do readout
- MMC will write sensor values into AMC FPGA memory using SPI
- create Issue discussing how ARTIQ will make use of sensors on PCB
- which sensors need to be readout -- eg chip die temperature
- readout frequency
- where should the data go
analog mezzanine boards
- agreed to add 2 SMP for 100 MHz clock for generation of LO on analog-mezzanine
- noise specification for power to mezzanine boards discussed
- @dhslichter did a study considering ADL5375 modulator and ERA-4XSM+ amplifier as sample parts, aimed for 1e-4 stability
- initial conclusion: "10 mVpp DC 20 Hz to 20 MHz suffices", Greg says this is easy using switching supplies with no LDO
- this conclusion is predicated upon use of ADM7150 or ADM7154 LDOs on the analog mezzanine; they give 40 dB isolation at 10 MHz (better at lower frequencies)
- to be determined if LDO is needed after switching supply on the Sayma RTM motherboard or not; will be determined during power analysis; ACTION add a new Issue for power study tasks
CERN review
- once the design layout is finished and inspected by physicists will be sent to CERN for review by Javier Serrano and others
- CERN is likely interested only in AMC
timeline
- Sayma RTM and Sayma AMC schematics will be ready by 10/20 @gkasprow
- other schematics will be written while physicists review
TODO
- @jbqubt add SMA wrench info
- new Issue for analog mezzanines 1) 200 MHz 2) higher-frequency