SolisCloud: Clear time windows for charge/discharge to prevent overlapping windows

[CraigCallender]

Fix: Clear Stale Slot Times Before Writing Active Window (Solis V2 Mode)

Problem

When Predbat controls a Solis inverter in TOU V2 mode via the SolisCloud API, writing a new charge or discharge time window can fail if another slot still has stale (non-zero) times on the inverter from a previous cycle where the clear write failed.

The SolisCloud API rejects any write that would result in overlapping time windows across slots, even if the conflicting slot is disabled. Because the previous code iterated slots 1–6 in a single pass, it was possible for the slot 1 active write to be attempted before stale times in slots 2–6 had been cleared, causing the API to reject it with an overlap conflict.

Changes

solis.py — Two-pass write ordering in write_time_windows_if_changed() (V2 mode)

The single-pass slot loop has been replaced with a three-phase approach:

1. Prep loop — for each slot, zeroes out times in the local time_windows copy for any disabled charge or discharge direction (this was already done for V1 mode and is now consistent across both modes).
2. Pass 1 (clear disabled slots) — iterates all slots and writes enable=0 + time=00:00-00:00 for every disabled direction that still has stale data in the inverter cache. Only enable and time are written; SOC and current are not touched for disabled slots.
3. Pass 2 (write active slots) — iterates all slots and writes the full settings (enable, time, SOC, current) for any enabled direction.

This ordering guarantees that by the time the active slot's new time window is written, all other slots have already had their clear operations sent to the inverter (or confirmed already-clear from cache), eliminating the API overlap rejection.

tests/test_solis.py — Updated and extended tests

• test_write_time_windows_v2_mode — updated call count (8 → 6) and discharge assertions to reflect that disabled slots only receive enable + time writes (not SOC/current), and that the disabled discharge time is cleared to 00:00-00:00.
• test_write_time_windows_v2_no_changes — pre-seeds the cache with the already-cleared discharge state so the no-changes assertion remains correct.
• test_write_time_windows_v2_stale_slot_clearing (new) — directly validates the edge case: slot 2 has stale active times in cache, slot 1 is the desired active window. Asserts that the slot 2 clear writes appear in call order before any slot 1 active writes.

[Copilot]

Pull request overview

This PR adjusts SolisCloud TOU V2 time-window programming to avoid API rejections caused by stale (non-zero) slot times lingering in disabled slots, by clearing disabled slot times before writing any active slot windows.

Changes:

• Refactors write_time_windows_if_changed() (V2 mode) into a prep step plus two write passes: clear disabled slot enable/time first, then write enabled slot settings.
• Updates the existing V2 tests to match the new write behavior (disabled slots only get enable+time cleared).
• Adds a new test intended to validate stale-slot clearing order.

Reviewed changes

Copilot reviewed 3 out of 3 changed files in this pull request and generated 1 comment.

File	Description
apps/predbat/solis.py	Implements two-pass write ordering in TOU V2 mode to clear disabled slot windows before writing active windows.
apps/predbat/tests/test_solis.py	Updates V2 assertions/call counts and adds a new test for stale-slot clearing ordering.