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@jserv jserv commented Nov 6, 2025

This implements complete support for RISC-V architectural compliance tests that use the tohost/fromhost protocol.

  • Add check_tohost_write() function to detect writes to tohost address
  • Extract tohost/fromhost symbol addresses from ELF during init
  • Add tohost detection hooks to all store instructions:
    • Basic stores: SB, SH, SW
    • Atomic operations: SC.W, AMOSWAP.W, AMOADD.W, AMOXOR.W, AMOAND.W, AMOOR.W, AMOMIN.W, AMOMAX.W, AMOMINU.W, AMOMAXU.W
    • Floating point: FSW
    • Compressed: C.SW, C.SWSP, C.FSW, C.FSWSP
    • Fused operations: Multiple SW fusion
  • Remove exit code truncation to preserve full test numbers
  • Add tohost_addr/fromhost_addr fields to riscv_t structure

All changes are conditionally compiled with RV32_HAS(ARCH_TEST) to ensure zero overhead when the feature is disabled. The implementation follows the RISC-V tohost protocol: tests write exit code to tohost (extracted as value >> 1) and enter infinite loop.


Summary by cubic

Add full RISC-V architectural (RISCOF) compliance test support using the tohost/fromhost protocol. The emulator now detects tohost writes, halts, and returns the correct exit code.

  • New Features
    • Parse tohost/fromhost symbol addresses from the ELF at startup when arch-test mode is enabled.
    • Detect writes to tohost across all store paths (SB/SH/SW, AMO/SC.W, FSW, compressed stores, fused multi-SW) and halt with exit_code = value >> 1.
    • Preserve full exit codes (no truncation).
    • Add tohost_addr/fromhost_addr fields and setter APIs on riscv_t.
    • Fully gated behind RV32_HAS(ARCH_TEST) for zero overhead when disabled.

Written for commit 0767f16. Summary will update automatically on new commits.

This implements complete support for RISC-V architectural compliance
tests that use the tohost/fromhost protocol.
- Add check_tohost_write() function to detect writes to tohost address
- Extract tohost/fromhost symbol addresses from ELF during init
- Add tohost detection hooks to all store instructions:
  * Basic stores: SB, SH, SW
  * Atomic operations: SC.W, AMOSWAP.W, AMOADD.W, AMOXOR.W, AMOAND.W,
    AMOOR.W, AMOMIN.W, AMOMAX.W, AMOMINU.W, AMOMAXU.W
  * Floating point: FSW
  * Compressed: C.SW, C.SWSP, C.FSW, C.FSWSP
  * Fused operations: Multiple SW fusion
- Remove exit code truncation to preserve full test numbers
- Add tohost_addr/fromhost_addr fields to riscv_t structure

All changes are conditionally compiled with RV32_HAS(ARCH_TEST) to
ensure zero overhead when the feature is disabled. The implementation
follows the RISC-V tohost protocol: tests write exit code to tohost
(extracted as value >> 1) and enter infinite loop.
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Benchmarks

Benchmark suite Current: 0767f16 Previous: 0a8c53c Ratio
Dhrystone 1315 Average DMIPS over 10 runs 1265 Average DMIPS over 10 runs 0.96
Coremark 911.157 Average iterations/sec over 10 runs 902.645 Average iterations/sec over 10 runs 0.99

This comment was automatically generated by workflow using github-action-benchmark.

cubic-dev-ai[bot]

This comment was marked as resolved.

@jserv jserv merged commit bd0f10a into master Nov 6, 2025
24 of 25 checks passed
@jserv jserv deleted the riscof branch November 6, 2025 13:31
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2 participants