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Add tm_cause_interrupt_sync() for in-line ISR#5

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jserv merged 1 commit into
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May 13, 2026
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Add tm_cause_interrupt_sync() for in-line ISR#5
jserv merged 1 commit into
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improve

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@jserv jserv commented May 13, 2026

interrupt_processing was measuring the same trap-plus-ISR-thread path interrupt_preemption_processing already exercises. Introduce tm_cause_interrupt_sync() so that test measures only the cost of the ISR body plus the semaphore handshake, and route interrupt_processing through the new entry.

Each port supplies both primitives:
tm_cause_interrupt() trap/IRQ-pend/ISR-thread path (unchanged)
tm_cause_interrupt_sync() inline tm_interrupt_handler() on the
caller's stack

FreeRTOS Cortex-M brackets the inline call with cpsid i/cpsie i and sets a benchmark-only flag so tm_{thread_resume,semaphore_put} take the FromISR path during the handler -- functionally safe under PRIMASK, no real ISR or context switch can race. ThreadX Cortex-M emulates an ISR preamble (system_state++ / preempt_disable++) under cpsid i and defers any handler-driven preemption to tm_threadx_benchmark_sync_complete() after cpsie i, mirroring real ISR semantics. POSIX hosts call the handler directly: their semaphore and resume APIs are mutex-guarded and safe from thread context.


Summary by cubic

Add tm_cause_interrupt_sync() to run the interrupt handler in-line and remove trap/ISR-thread overhead from interrupt_processing. This separates the two interrupt benchmarks and improves measurement accuracy.

  • New Features

    • Added tm_cause_interrupt_sync() in tm_api.h and documented it in README; tm_cause_interrupt() remains for the real IRQ/trap path.
    • Updated interrupt_processing.c to use tm_cause_interrupt_sync() so it measures only the ISR body plus the semaphore handshake.
    • Port updates: FreeRTOS Cortex‑M masks IRQs and uses a benchmark flag so tm_thread_resume/tm_semaphore_put take the FromISR path safely; ThreadX Cortex‑M emulates ISR preamble and defers preemption via tm_threadx_benchmark_sync_complete(); POSIX calls the handler directly.
  • Migration

    • Ports must implement both tm_cause_interrupt() and tm_cause_interrupt_sync(); if no safe inline path exists, alias the sync variant to the async one.

Written for commit 2696506. Summary will update on new commits.

interrupt_processing was measuring the same trap-plus-ISR-thread path
interrupt_preemption_processing already exercises.  Introduce
tm_cause_interrupt_sync() so that test measures only the cost of the
ISR body plus the semaphore handshake, and route interrupt_processing
through the new entry.

Each port supplies both primitives:
  tm_cause_interrupt()       trap/IRQ-pend/ISR-thread path (unchanged)
  tm_cause_interrupt_sync()  inline tm_interrupt_handler() on the
                             caller's stack

FreeRTOS Cortex-M brackets the inline call with cpsid i/cpsie i and sets
a benchmark-only flag so tm_{thread_resume,semaphore_put} take the
FromISR path during the handler -- functionally safe under PRIMASK, no
real ISR or context switch can race.  ThreadX Cortex-M emulates an ISR
preamble (system_state++ / preempt_disable++) under cpsid i and defers
any handler-driven preemption to tm_threadx_benchmark_sync_complete()
after cpsie i, mirroring real ISR semantics. POSIX hosts call the
handler directly: their semaphore and resume APIs are mutex-guarded and
safe from thread context.
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No issues found across 7 files

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Thread-Metric Benchmark Results

✅ All tests passed425e648 — 2026-05-13T05:05:51Z

Summary

RTOS Target OS Status Passed Failed Total
freertos cortex-m ubuntu-24.04 ✅ passed 8 0 8
freertos posix macos-latest ✅ passed 8 0 8
freertos posix ubuntu-24.04 ✅ passed 8 0 8
threadx cortex-m ubuntu-24.04 ✅ passed 8 0 8
threadx posix macos-latest ✅ passed 8 0 8
threadx posix ubuntu-24.04 ✅ passed 8 0 8

Per-Test Results

Test freertos/cortex-m freertos/posix freertos/posix threadx/cortex-m threadx/posix threadx/posix
basic_processing
cooperative_scheduling
preemptive_scheduling
message_processing
synchronization_processing
memory_allocation
interrupt_processing
interrupt_preemption_processing

@jserv jserv merged commit f61cbf5 into main May 13, 2026
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@jserv jserv deleted the improve branch May 13, 2026 05:06
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