riscv64: mv clear_bss to entry assembly code Fix #179 #180
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@CHonghaohao Please review it. Now it is needed for eic7700x soc. |
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Before, I want use cpu0 to clear bss segment, but I forget the first entry cpu could not be cpu0. |
CHonghaohao
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Jul 18, 2025
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Great job! It has fixed the occasional issue of no output when booting on the BSP.
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This PR is to fix #179.
Mv clear_bss function before println, because println uses PRINT_LOCK which is in bss segment.
I use cpu0 to clear_bss, it could see cleared bss segment sure.
In order to let other cores could see cleared bss, I use
fence rw, rwto ensure other cores run into rust_main after seeing cleared bss segment.