EQ IIR: Increase IPC length, simplify initialization, and dcache invalidate code#317
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lgirdwood merged 2 commits intothesofproject:masterfrom Sep 6, 2018
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This patch changes equalizer initialization to store the allocated delay lines buffers address in a single pointer and size component data. This simplifies the dcache invalidate code avoids knowledge of filter internals that may change for future intrinsic optimized version. The EQ reconfigure and responses switching is by this patch changed to happen in prepare() to avoid doing unnecessary allocation and free operations in typical component life cycle. Prior to to prepare sent configuration is just stored but not initialized into equalizers. On-the-fly response switching can be enabled later with some work for the component. Signed-off-by: Seppo Ingalsuo <seppo.ingalsuo@linux.intel.com>
This patch increases IPC length to be sufficient for e.g. 2x 12th order IIR configuration. This is near to minimum feasible to enable testing of equalizers. There may be need to adjust the limit up even more later but this is the proposal now until we know better the requirements. Signed-off-by: Seppo Ingalsuo <seppo.ingalsuo@linux.intel.com>
singalsu
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singalsu
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tlauda
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Sep 6, 2018
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| dcache_invalidate_region(dev, sizeof(*dev)); | ||
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| cd = comp_get_drvdata(dev); |
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comp_data should be retrieved after invalidation of dev, since we can potentially have the wrong pointer.
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Thanks, a new pull request with fix for this is on the way.
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