Topology: Add DMIC capture pipeline with gain and high-pass filter

topology/Makefile.am

@@ -39,7 +39,8 @@ MACHINES = \
 	sof-apl-da7219.tplg \
 	sof-glk-da7219.tplg \
 	sof-icl-nocodec.tplg \
-	sof-apl-eq-pcm512x.tplg
+	sof-apl-eq-pcm512x.tplg \
+	sof-apl-eq-dmic.tplg
 
 # Uncomment the following line if you want to debug conf files
 .PRECIOUS: %.conf
@@ -79,4 +80,5 @@ EXTRA_DIST = \
 	sof-apl-da7219.m4 \
 	sof-glk-da7219.m4 \
 	sof-icl-nocodec.m4 \
-	sof-apl-eq-pcm512x.m4
+	sof-apl-eq-pcm512x.m4 \
+	sof-apl-eq-dmic.m4

topology/m4/eq_fir_coef_flat.m4

@@ -0,0 +1,6 @@
+# Flat FIR EQ 11-Oct-2018
+CONTROLBYTES_PRIV(EQFIR_priv,
+`       bytes "0x18,0x00,0x00,0x00,0x02,0x00,0x01,0x00,'
+`       0x00,0x00,0x00,0x00,0x04,0x00,0xff,0xff,'
+`       0x00,0x40,0x00,0x00,0x00,0x00,0x00,0x00"'
+)

topology/m4/eq_iir_coef_flat.m4

@@ -0,0 +1,10 @@
+# Flat IIR EQ 11-Oct-2018
+CONTROLBYTES_PRIV(EQIIR_priv,
+`       bytes "0x38,0x00,0x00,0x00,0x02,0x00,0x00,0x00,'
+`       0x01,0x00,0x00,0x00,0x00,0x00,0x00,0x00,'
+`       0x00,0x00,0x00,0x00,0x01,0x00,0x00,0x00,'
+`       0x01,0x00,0x00,0x00,0x00,0x00,0x00,0x00,'
+`       0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,'
+`       0x00,0x00,0x00,0x00,0x9e,0x73,0x13,0x20,'
+`       0x00,0x00,0x00,0x00,0xb2,0x7f,0x00,0x00"'
+)

topology/m4/eq_iir_coef_highpass_50hz_20db_48khz.m4

@@ -0,0 +1,10 @@
+# 50 Hz 2nd order high-pass and +20 dB gain 09-Oct-2018
+CONTROLBYTES_PRIV(EQIIR_priv,
+`       bytes "0x38,0x00,0x00,0x00,0x02,0x00,0x00,0x00,'
+`       0x01,0x00,0x00,0x00,0x00,0x00,0x00,0x00,'
+`       0x00,0x00,0x00,0x00,0x01,0x00,0x00,0x00,'
+`       0x01,0x00,0x00,0x00,0x63,0xf3,0x96,0xc0,'
+`       0xc6,0x59,0x68,0x7f,0x6d,0x89,0xed,0x1f,'
+`       0x27,0xed,0x24,0xc0,0x6d,0x89,0xed,0x1f,'
+`       0xfc,0xff,0xff,0xff,0xd0,0x4f,0x00,0x00"'
+)

topology/sof-apl-eq-dmic.m4

@@ -0,0 +1,75 @@
+#
+# Topology for Apollo Lake with direct attach digital microphones array
+#
+
+# Include topology builder
+include(`utils.m4')
+include(`dai.m4')
+include(`pipeline.m4')
+
+# Include TLV library
+include(`common/tlv.m4')
+
+# Include Token library
+include(`sof/tokens.m4')
+
+# Include Apollolake DSP configuration
+include(`platform/intel/bxt.m4')
+include(`platform/intel/dmic.m4')
+
+#
+# Define the pipelines
+#
+# PCM6 <---- volume <----- DMIC6 (DMIC01)
+#
+
+dnl PIPELINE_PCM_ADD(pipeline,
+dnl     pipe id, pcm, max channels, format,
+dnl     frames, deadline, priority, core)
+
+
+# Passthrough capture pipeline 13 on PCM 6 using max 4 channels.
+# Schedule 48 frames per 1000us deadline on core 0 with priority 0
+PIPELINE_PCM_ADD(sof/pipe-eq-capture.m4,
+	1, 6, 4, s32le,
+	48, 1000, 0, 0)
+
+#
+# DAIs configuration
+#
+
+dnl DAI_ADD(pipeline,
+dnl     pipe id, dai type, dai_index, dai_be,
+dnl     buffer, periods, format,
+dnl     frames, deadline, priority, core)
+
+
+# capture DAI is DMIC 0 using 2 periods
+# Buffers use s32le format, with 48 frame per 1000us on core 0 with priority 0
+DAI_ADD(sof/pipe-dai-capture.m4,
+	1, DMIC, 0, NoCodec-6,
+	PIPELINE_SINK_1, 2, s32le,
+	48, 1000, 0, 0)
+
+dnl PCM_DUPLEX_ADD(name, pcm_id, playback, capture)
+
+dnl PCM_CAPTURE_ADD(name, pipeline, capture)
+PCM_CAPTURE_ADD(DMIC01, 6, PIPELINE_PCM_1)
+
+#
+# BE configurations - overrides config in ACPI if present
+#
+
+dnl DAI_CONFIG(type, dai_index, link_id, name, ssp_config/dmic_config)
+
+DAI_CONFIG(DMIC, 0, 6, NoCodec-6,
+	   dnl DMIC_CONFIG(driver_version, clk_min, clk_mac, duty_min, duty_max,
+	   dnl		   sample_rate,
+	   dnl		   fifo word length, type, dai_index, pdm controller config)
+	   DMIC_CONFIG(1, 500000, 4800000, 40, 60, 48000,
+		dnl DMIC_WORD_LENGTH(frame_format)
+		DMIC_WORD_LENGTH(s32le), DMIC, 0,
+		dnl PDM_CONFIG(type, dai_index, num pdm active, pdm tuples list)
+		dnl STEREO_PDM0 is a pre-defined pdm config for stereo capture
+		PDM_CONFIG(DMIC, 0, FOUR_CH_PDM0_PDM1)))
+

topology/sof/pipe-eq-capture.m4

@@ -0,0 +1,74 @@
+# Capture Passthrough Pipeline and PCM
+#
+# Pipeline Endpoints for connection are :-
+#
+#  host PCM_C <-- B0 <-- sink DAI0
+
+# Include topology builder
+include(`utils.m4')
+include(`buffer.m4')
+include(`pcm.m4')
+include(`dai.m4')
+include(`pipeline.m4')
+include(`bytecontrol.m4')
+include(`eq_iir.m4')
+
+#
+# Controls
+#
+
+# Use 50 Hz highpass response with +20 dB gain
+include(`eq_iir_coef_highpass_50hz_20db_48khz.m4')
+
+# EQ Bytes control with max value of 255
+C_CONTROLBYTES(EQIIR, PIPELINE_ID,
+	CONTROLBYTES_OPS(bytes, 258 binds the mixer control to bytes get/put handlers, 258, 258),
+	CONTROLBYTES_EXTOPS(258 binds the mixer control to bytes get/put handlers, 258, 258),
+	, , ,
+	CONTROLBYTES_MAX(, 316),
+	,
+	EQIIR_priv)
+
+#
+# Components and Buffers
+#
+
+# Host "Highpass Capture" PCM
+# with 0 sink and 2 source periods
+W_PCM_CAPTURE(PCM_ID, Highpass Capture, 0, 2, 2)
+
+# "EQ 0" has 2 sink period and 2 source periods
+W_EQ_IIR(0, PIPELINE_FORMAT, 2, 2, 2, LIST(`		', "EQIIR"))
+
+# Capture Buffers
+W_BUFFER(0, COMP_BUFFER_SIZE(2,
+	COMP_SAMPLE_SIZE(PIPELINE_FORMAT), PIPELINE_CHANNELS, SCHEDULE_FRAMES),
+	PLATFORM_PASS_MEM_CAP)
+
+W_BUFFER(1, COMP_BUFFER_SIZE(2,
+	COMP_SAMPLE_SIZE(PIPELINE_FORMAT), PIPELINE_CHANNELS, SCHEDULE_FRAMES),
+	PLATFORM_PASS_MEM_CAP)
+
+#
+# Pipeline Graph
+#
+#  host PCM_C <--- B1 <--- EQ_IIR 0 <-- B0 <-- sink DAI0
+
+P_GRAPH(pipe-pass-capture-PIPELINE_ID, PIPELINE_ID,
+	LIST(`		',
+	`dapm(Highpass Capture PCM_ID, N_PCMC(PCM_ID))',
+	`dapm(N_PCMC(PCM_ID), N_BUFFER(1))',
+	`dapm(N_BUFFER(1), N_EQ_IIR(0))',
+        `dapm(N_EQ_IIR(0), N_BUFFER(0))'))
+
+#
+# Pipeline Source and Sinks
+#
+indir(`define', concat(`PIPELINE_SINK_', PIPELINE_ID), N_BUFFER(0))
+indir(`define', concat(`PIPELINE_PCM_', PIPELINE_ID), Highpass Capture PCM_ID)
+
+#
+# PCM Configuration
+#
+
+PCM_CAPABILITIES(Highpass Capture PCM_ID, COMP_FORMAT_NAME(PIPELINE_FORMAT), 48000, 48000, PIPELINE_CHANNELS, PIPELINE_CHANNELS, 2, 16, 192, 16384, 65536, 65536)