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Tock Implementation for HiFive Inventor#3125

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TeodoraMiu wants to merge 2 commits intotock:masterfrom
WyliodrinEmbeddedIoT:hifive_inventor
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Tock Implementation for HiFive Inventor#3125
TeodoraMiu wants to merge 2 commits intotock:masterfrom
WyliodrinEmbeddedIoT:hifive_inventor

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@TeodoraMiu
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Pull Request Overview

This draft pull request is a first attempt at developing Tock compatibility with the HiFive Inventor board (https://www.hifiveinventor.com/user-guide/overview).
I have used the hifive1 board implementation as guidance and changed the memory layout to correspond to the Hifive Inventor's FE310-G003 processor. I also made some other changes, such as the baud rate of the serial port, to match the new board.
At the moment, I have successfully connected the board via JLink and flashed the kernel to the board. However, I am having some difficulties with the board's debugger. Debug messages are not shown, so I tried to display a panic and it seems to double panic in the panic handler. Here is the output I received (after the 'tockloader listen' command):

Sleep BK1 0x00000000 BK15 0xbed0bed0
After BK1 0x00000000 BK15 0xbed0bed0

PMU IE 0x00000005 
Bootloader version: 2.40 09/10/2020 12:17:19
Sleep BK1 0x00000000 BK15 0xbed0bed0
After BK1 0x00000000 BK15 0xbed0bed0

PMU IE 0x00000005 CAUSE 0x00000100 BK1 0x00000000 BK15 0xbed0bed0

panicked at 
panicked at 'fatal exception', chips/e310x/src/chip.rs:181:13
        Kernel version release-2.0-820-ga8c97d5b7

---| Global debug wl `set_debug_writer_wrapper` in board initialization.

---| RISC-V Machine State |---
Last cause (mcause): Store/AMO access fault (interrupcode=0x00000007)
Last value (mtval):  0x7FFFFFFC

System register dump:
 mepc:    0x20010514    mstatus:     0x00001880
 mcycle:  0x08251Fet:    0x048662DE
 mtvec:   0x20010100
 mstatus: 0x00001880
  uie:    false  upie:   false
  sie:    false  spie:   false
  mie:    falselse               false 
  msoft:  true                false 
  utimer: false               false 
  stimer: false               false 
       false 
  sext:   false               false 
  mext:   true                false 

---| App Status |---

I am unsure why this is happening. @alistair23 I think you were the one to add the hifive1 board, any help from you would be greatly appreciated.

@alistair23
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I would try moving the panic further along in main() it looks like you are getting the Call set_debug_writer_wrapper in board initialization. error, which means you are trying to print before set_debug_writer_wrapper() gets called.

If you aren't getting output, one trick is to disable all UART configuration in Tock (comment it out in chips). It looks like the previous stage is using the UART so you probably don't need to configure the UART to have it work. If that works you can then work backwards to re-enable the configuration and see where it stops working.

We eventually need Tock to configure the UART, but for testing it can be useful to try that

@bradjc
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bradjc commented Sep 19, 2022

Moved to #3225

@bradjc bradjc closed this Sep 19, 2022
bors Bot added a commit that referenced this pull request Sep 22, 2022
3225: BBC HiFive Inventor board ported to Tock r=bradjc a=mateibarbu19

### Pull Request Overview

This pull request aims to port Tock to the [BBC HiFive Inventor board](https://www.hifiveinventor.com/).

The source is mostly copied from the SiFive HiFive1 Rev B board.

I followed an earlier [attempt](#3125), made by `@TeodoraMiu,` who tried to:

- increased ram size in `layout.ld`
- decreased baudrate for the serial interface

However the problems noticed with the UART speed were caused by a lack of configuration of the internal frequency. This was solved by [merge #3215](#3215). (The code is also commited here.)

Still there were some bugs in the original `sifive` crate. When trying to clear all pending PL-interrupts a read-only register is [overwritten](https://github.com/tock/tock/blob/93d50be711b959d5dceeb17f8d4b60c6cee3e2b3/chips/sifive/src/plic.rs#L50).
The manual states another way to clear interrupts, by reading the `claim` register and writing the (or a) value back. See this [commit](WyliodrinEmbeddedIoT@4dbafb6).

The new HiFive board featured a different chip which didn't use the same indexing of interrupt numbers. So implementing a different `InterruptService` for each chip was necessary. So the `e310x` chip implementation was split in two, `e310_g002` and `e310_g003`, which handle each interrupt number differently.

I also added the second UART peripheral in order to disable any unwanted interrupts from it.

### Testing Strategy

This pull request was tested by checking the serial output of the
`hifive_inventor` target and the `hifive1` qemu simulation.


### Help Wanted

This pull request still needs to be physically tested on a hifive1 board.

`@gemarcano` could you please do this?

### Documentation Updated

- [x] boards/README.md
- [x] boards/hifive_inventor/README.md
- [x] chips/e310_g002/README.md
- [x] chips/e310_g003/README.md

### Formatting

- [x] Ran `make prepush`.


Co-authored-by: Matei Barbu <matei.barbu1905@stud.acs.upb.ro>
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3 participants