Serial data processing module design/implementation using VHDL.
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Updated
May 26, 2023 - Tcl
Serial data processing module design/implementation using VHDL.
RISC-V single-cycle processor written in Verilog using the Quartus tool. Implementation of bubble sort through assembly language.
Behavioral architecture of a TI SN74ALS561A chip.
A digital safe designed in Vivado, which has a 4 digit decimal password, and is implemented on PYNQ-Z2 board and RPI-Logic board
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