Here are
24 public repositories
matching this topic...
VexRiscv cpu on FPGA. [This fork is only a mirror, not for development]
Updated
Sep 4, 2022
Verilog
Template with latest framework for SoCkit (MiSTer)
Updated
Dec 30, 2022
Verilog
Mega CD for Sockit (MiSTer)
Updated
Jun 19, 2022
Verilog
NeoGeo for Sockit (MiSTer)
Updated
Jun 21, 2022
Verilog
Commodore C16 and Plus/4 for Sockit (MiSTer)
Updated
Jun 20, 2022
Verilog
Flappy Bird core for MiSTer, MiST, DeMiSTify, Xilinx, GoWin, ...
Updated
Jul 9, 2023
Verilog
MiSTer menu.rbf for SoCkit board
Updated
Dec 26, 2022
Verilog
Updated
Jun 21, 2022
Verilog
MiSTer SoCkit version. Common framework for MiST(er), SiDi, ZX-UNO/DOS and Unamiga core development. With special focus on arcade cores.
Updated
Apr 1, 2023
Verilog
Memtest core for SoCkit board to test SDRAM MiSTer modules with GPIO addon
Updated
Sep 4, 2022
Verilog
Gameboy for SoCkit (MiSTer firmware)
Updated
Aug 20, 2022
Verilog
Universal Cosmic series games (Z80 based)
Updated
Sep 4, 2022
Verilog
Minimig for SoCkit (MiSTer)
Updated
Sep 4, 2022
Verilog
ao486 port for SoCkit (MiSTer)
Updated
Sep 4, 2022
Verilog
SoCkit (MiSTer) Port of Game and Watch Games
Updated
Jul 16, 2022
Verilog
ZX Spectrum 48K FPGA implementation for Sockit boards
Updated
Jun 26, 2022
Verilog
Checks the sanity of the SDRAM module on MiST and MiSTer systems
Updated
Aug 6, 2022
Verilog
Sega Genesis for SoCkit (MiSTer firmware)
Updated
Jun 30, 2022
Verilog
ZX Spectrum port for Sockit (Mister)
Updated
Jun 21, 2022
Verilog
Q*Bert core for MiSTer for the Terasic/Arrow SoCKit
Updated
Dec 24, 2022
Verilog
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