Matrix multiplication on multiple Nios II cores
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Updated
Feb 12, 2020 - C
Matrix multiplication on multiple Nios II cores
Hardware Description Languages
Hardware and software interfaces for the PS/2 keyboard/mouse protocol, for Terasic's DE1-SoC platform. Written in SystemVerilog and C.
Code from FPGA programming with the Altera Nios II
Frogger-inspired game for a Nios II architecture on Terasic's DE1-SoC platform.
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