nios2
Here are 33 public repositories matching this topic...
Matrix multiplication on multiple Nios II cores
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Feb 12, 2020 - C
A sample design of Nios with on-board SDRAM for CYC1000 (a low cost Cyclone10 FPGA board)
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Jul 8, 2021 - Verilog
FPGA SOC Mario NES in SystemVerilog. Built on a DE-10 Lite FPGA, synthesized in Quartus Prime 18.1
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Dec 16, 2021 - Verilog
Various VGA video output projects on the NIOS II processor
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Sep 22, 2018 - Assembly
A Deep Neural Network-inference accelerator is created in hardware. The codes for hardware is written in System Verilog. The hardware module is interfaced with NIOS computer system, thus this hardware acts as a peripheral to the computer system. The driver code to interface the hardware is written in C. Speedup compard to software is 400 times.
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Nov 18, 2020 - SystemVerilog
Design MMU for socfpga-linux 4.11. Test with Altera DE2-115.
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Apr 13, 2017 - Verilog
Hardware Description Languages
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Jan 7, 2019 - C
A compiler for a custom made language to control robots.
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Dec 18, 2016 - Assembly
Code from FPGA programming with the Altera Nios II
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Apr 23, 2020 - C
SHA-1 implementation on Nios II soft-core processor with C and SystemVerilog.
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Aug 23, 2024 - C
Designing a simple processor system on FPGA. This is demo project to test FPGA DE10-Standard and develop a simpe Nios2 app.
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Aug 19, 2021 - Verilog
SoC and Embedded Linux
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Oct 22, 2024 - JavaScript
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