#
universidade-de-aveiro
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Monitor and bock the IPs that make a DoS attack to a server with an FPGA
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Updated
Sep 9, 2018 - VHDL
Design a digital circuit that encodes and decodes strings with CRC-8 algorithm with an optimal delay and number of components
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Updated
Sep 9, 2018 - VHDL
Program the FPGA with mastermind game
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Updated
Sep 10, 2018 - VHDL
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