-
Updated
Aug 8, 2017 - HTML
#
verilog-hdl
Here are 8 public repositories matching this topic...
This repo contains the EEL2020 course project, which was instructed to be made in hindi.
-
Updated
Jul 2, 2024 - HTML
Snake game using Verilog on Spartan®-6 FPGA
-
Updated
Jun 29, 2018 - HTML
4bit_CLA_Adder_7seg in Xilinx Vivado Verilog
-
Updated
Mar 6, 2018 - HTML
CSE460 - VLSI Design
-
Updated
Feb 9, 2023 - HTML
A Logic Circuit Static Timing Analyzer Implemented in Python 🔌 ⚡ (2018)
python
c
html
json
graph-algorithms
scl
verilog
logic-gates
verilog-hdl
logic-circuit
static-timing-analysis
-
Updated
Mar 25, 2021 - HTML
Improve this page
Add a description, image, and links to the verilog-hdl topic page so that developers can more easily learn about it.
Add this topic to your repo
To associate your repository with the verilog-hdl topic, visit your repo's landing page and select "manage topics."