This is a 8 bit binary number multiplier using wallace tree.
-
Updated
Mar 11, 2018 - VHDL
This is a 8 bit binary number multiplier using wallace tree.
A VHDL code generator for wallace tree multiplier
Design and Analysis of an FPGA-based Wallace Multiplier.
Add a description, image, and links to the wallace-tree-multiplier topic page so that developers can more easily learn about it.
To associate your repository with the wallace-tree-multiplier topic, visit your repo's landing page and select "manage topics."