ISA

Instructions

0: MW reg, imm8/reg -> reg = imm8/reg
1: LW reg, [imm16/HL] -> reg = [HL/imm16]
2: SW [imm16/HL], reg -> [HL/imm16] = reg
3: PUSH imm8/reg -> [SP--] = imm8/reg
4: POP reg -> reg = [++SP]
5: LDA [imm16] -> HL = imm16
6: JNZ imm8/reg -> PC = HL if imm8/reg != 0 else NOP
7: INB reg, imm8/reg -> reg = PORT[imm8/reg]
8: OUTB imm8/reg, reg -> PORT[imm8/reg] = reg
9: ADD^ reg, imm8/reg -> reg = reg + imm8/reg
A: ADC^ reg, imm8/reg -> reg = reg + imm8/reg + c
B: AND reg, imm8/reg -> reg = reg & imm8/reg
C: OR reg, imm8/reg -> reg = reg | imm8/reg D: NOR reg, imm8/reg -> reg = ~(reg | imm8/reg) E: CMP^ reg, imm8/reg -> f = compare reg, imm8/reg (see below) F: SBB^ reg, imm8/reg -> reg = reg - imm8/reg - b

Registers

WIP

Instruction Layout

WIP

Memory Layout

WIP

Memory Banking

WIP

Ports

WIP

Status Register

WIP

Video

WIP