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FIR-214: Add reserved memory area beginning 0x56A0_000 of 512 MB and Enable NVME #7

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Merged
merged 2 commits into from
Oct 16, 2024
Merged

FIR-214: Add reserved memory area beginning 0x56A0_000 of 512 MB and Enable NVME #7

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23af72f
@FIR-214: Added 512 MB Reserved memory pool for Model
Oct 15, 2024
d2b9b6f
@FIR-214: Enabling the PCI-E for NVME
Oct 16, 2024
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2 changes: 1 addition & 1 deletion arch/arm64/boot/dts/intel/socfpga_agilex.dtsi
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Original file line number Diff line number Diff line change
Expand Up @@ -27,7 +27,7 @@
};
service_reserved1: svcbuffer@1 {
compatible = "shared-dma-pool";
reg = <0x0 0x7F000000 0x0 0x7FFFFFFF>;
reg = <0x0 0x56A00000 0x0 0x20000000>;
alignment = <0x1000>;
no-map;
};
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6 changes: 0 additions & 6 deletions arch/arm64/boot/dts/intel/socfpga_agilex_bittware.dts
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Expand Up @@ -181,14 +181,8 @@
};
};

/* To test TXE blob with DDR, we need to comment out PCIE & SSD */
#ifdef DDR_ACCESS
&pcie_0_pcie_aglx {
status = "okay";
compatible = "altr,pcie-root-port-3.0-f-tile";
/* interrupts = <0 0 0>; */
/* interrupts = <32 IRQ_TYPE_LEVEL_HIGH>;
interupt_parent = <&intc>; */
};
#endif