GitHub - umstek/MicroprocessorSimulator: Nanoprocessor i.e. a simple microprocessor emulated using Basys2 Spartan-3E FPGA board (CS2052 Computer Architecture

Branches Tags

Name		Name	Last commit message	Last commit date
Latest commit History 1 Commit
_ngo		_ngo
_xmsgs		_xmsgs
iseconfig		iseconfig
isim		isim
xlnx_auto_0_xdb		xlnx_auto_0_xdb
xst/work		xst/work
ADDER_3_bit.jhd		ADDER_3_bit.jhd
ADDER_3_bit.sch		ADDER_3_bit.sch
ADDER_3_bit.sym		ADDER_3_bit.sym
ADDER_3_bit.vhf		ADDER_3_bit.vhf
ALUnReg.jhd		ALUnReg.jhd
ALUnReg.sch		ALUnReg.sch
ALUnReg.sym		ALUnReg.sym
ALUnReg.vhf		ALUnReg.vhf
ALUnReg_summary.html		ALUnReg_summary.html
Decoder2_4.jhd		Decoder2_4.jhd
Decoder2_4.sch		Decoder2_4.sch
Decoder2_4.sym		Decoder2_4.sym
Decoder2_4.vhf		Decoder2_4.vhf
Decoder3.jhd		Decoder3.jhd
Decoder3.sch		Decoder3.sch
Decoder3.sym		Decoder3.sym
Decoder3.vhf		Decoder3.vhf
FA.jhd		FA.jhd
FA.sch		FA.sch
FA.sym		FA.sym
FA.vhf		FA.vhf
HA.jhd		HA.jhd
HA.sch		HA.sch
HA.sym		HA.sym
HA.vhf		HA.vhf
INS_DECODER.jhd		INS_DECODER.jhd
INS_DECODER.sch		INS_DECODER.sch
INS_DECODER.sym		INS_DECODER.sym
INS_DECODER.vhf		INS_DECODER.vhf
LUT.jhd		LUT.jhd
LUT.sch		LUT.sch
LUT.sym		LUT.sym
LUT.vhf		LUT.vhf
LUT_LUT_sch_tb_isim_beh.exe		LUT_LUT_sch_tb_isim_beh.exe
LUT_LUT_sch_tb_stx_beh.prj		LUT_LUT_sch_tb_stx_beh.prj
MUX_2_4.jhd		MUX_2_4.jhd
MUX_2_4.sch		MUX_2_4.sch
MUX_2_4.sym		MUX_2_4.sym
MUX_2_4.vhf		MUX_2_4.vhf
MUX_8_4.jhd		MUX_8_4.jhd
MUX_8_4.sch		MUX_8_4.sch
MUX_8_4.sym		MUX_8_4.sym
MUX_8_4.vhf		MUX_8_4.vhf
Mux2_1.jhd		Mux2_1.jhd
Mux2_1.sch		Mux2_1.sch
Mux2_1.sym		Mux2_1.sym
Mux2_1.vhf		Mux2_1.vhf
Mux_2_3.jhd		Mux_2_3.jhd
Mux_2_3.sch		Mux_2_3.sch
Mux_2_3.sym		Mux_2_3.sym
Mux_2_3.vhf		Mux_2_3.vhf
PC.jhd		PC.jhd
PC.sch		PC.sch
PC.sym		PC.sym
PC.vhf		PC.vhf
PinAssignment.ucf		PinAssignment.ucf
RCA.jhd		RCA.jhd
RCA.sch		RCA.sch
RCA.sym		RCA.sym
RCA.vhf		RCA.vhf
REGISTER_4.jhd		REGISTER_4.jhd
REGISTER_4.sch		REGISTER_4.sch
REGISTER_4.sym		REGISTER_4.sym
REGISTER_4.vhf		REGISTER_4.vhf
ROM.jhd		ROM.jhd
ROM.sch		ROM.sch
ROM.sym		ROM.sym
ROM.vhf		ROM.vhf
ROMBANK.jhd		ROMBANK.jhd
ROMBANK.sch		ROMBANK.sch
ROMBANK.sym		ROMBANK.sym
ROMBANK.vhf		ROMBANK.vhf
ROM_ROM_sch_tb_isim_beh.exe		ROM_ROM_sch_tb_isim_beh.exe
ROM_ROM_sch_tb_stx_beh.prj		ROM_ROM_sch_tb_stx_beh.prj
Reg_Bank.jhd		Reg_Bank.jhd
Reg_Bank.sch		Reg_Bank.sch
Reg_Bank.sym		Reg_Bank.sym
Reg_Bank.vhf		Reg_Bank.vhf
Register_3_bit.jhd		Register_3_bit.jhd
Register_3_bit.sch		Register_3_bit.sch
Register_3_bit.sym		Register_3_bit.sym
Register_3_bit.vhf		Register_3_bit.vhf
TB_LUT.vhd		TB_LUT.vhd
TB_ROM.vhd		TB_ROM.vhd
TB_processor.vhd		TB_processor.vhd
finalProc.bld		finalProc.bld
finalProc.bmm		finalProc.bmm
finalProc.cmd_log		finalProc.cmd_log
finalProc.jhd		finalProc.jhd
finalProc.lso		finalProc.lso
finalProc.ncd		finalProc.ncd
finalProc.ngc		finalProc.ngc
finalProc.ngd		finalProc.ngd
finalProc.ngr		finalProc.ngr