An application specific processor modelled with the python MyHDL package.
Please be aware that this project is not finished. It is a "pet project" of mine and something that I plan to continue work on in my free time. It'll be "complete" someday but I'm not sure what that term really encompasses right now.
I fixed some issues with the ALU logic and initialization of signals for the simulation. Everything appears to be working as intended now.
- Automatically calculate time it will take for instructions to complete and set this as the simulation time.
- This will make it such that the user doesn't have to do it.
- Ability to output memory to a hex file
- Improve testing and verification.
- Add something for testing and verification to the API
- Make updates to whitepaper
- Make HALT instructions raise a "stop simulation"
code - contains code base
report - contains details about the project
- GTKWave
- For viewing Value Change Dump files