v4.4 — CPU OC correction

What's new in v4.4

CPU OC correction

• All "1608 MHz" labels changed to "CPU OC (teacupx)" — on stock dArkOSRE kernel the CPU does not run above ~1296 MHz regardless of the DTB patch
• Info screen removed "no kernel recompile needed" claim; now explicitly states: requires teacupx kernel, real max 1512 MHz
• RAM OC menu now shows "Tune voltage" or "Add 1032 MHz [EXPERIMENTAL]" when 924 MHz is already active

Docs

• README: GPU benchmark results clarified as full OC+UV comparison (not GPU-only)
• README: CPU OC section updated to reflect teacupx requirement

v4.3 — Bin detection fix for newer kernels

What's new in v4.3

Bug fix: bin detection on newer dArkOSRE kernels

Newer kernel versions (dArkOSRE 04262026 and later) no longer emit the opp-binning: using OPP prop name log line that the tuner uses to detect your chip's silicon bin (L0–L3). Instead, these kernels log pvtm-volt-sel=N, which maps directly to the bin level (sel=2 → L2).

The tuner now falls back to this method automatically if the original pattern is not found. Bin detection and caching work correctly on both old and new kernel versions.

If you were seeing “Bin not detected — reboot and try again” on a fresh boot, this release fixes it.

Thanks to u/skyrent for the detailed bug report and for identifying the fix independently.

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If you are on an older dArkOSRE release (before 04262026) this update is not required but does not break anything.

v4.2

New features

• CPU OC, GPU OC and RAM OC menus now detect whether the OPP node already exists in the DTB. If OC was previously applied, the menu skips the info/setup screens and goes directly to a voltage selector showing the current voltage. Allows tuning OC voltage at any time without re-applying OC. Applies to CPU 1608 MHz, GPU 600 MHz, RAM 928 MHz.
• CPU benchmark result now shows a note at 1608 MHz explaining that scores at 1512 and 1608 MHz may be similar due to ALU pipeline ceiling, and that real benefit varies by workload (emulation).

v4.1

v4.1

Fixes and improvements:

• Fix: Benchmark and DTB Tuning submenus now loop back to themselves after an action completes, instead of jumping to the main menu. Back button still exits to the main menu.
• Fix: Main menu now shows the shadow and blue backtitle bar, matching all other submenus.
• Fix: Console font changed to Lat7-TerminusBold20x10 — eliminates the 18px black strip at the bottom of the screen (480 / 20 = 24 rows exact).
• Fix: Gamepad button presses between dialogs no longer print characters to the console or scroll the screen (stty -echo on startup).
• Feat: RAM benchmark rewritten in C — replaces dd/tmpfs with direct memset and memcpy on a 128 MB buffer. Reports write (memset) and copy (memcpy) bandwidth in MB/s.

Full changelog: https://github.com/zenmode-adri/r36-tuner/blob/master/CHANGELOG.md

v3.9 - Release audit fixes

Bug fixes found during release audit:

• Fix: GPU benchmark score log showed wrong MHz value. Runner used glob /sys/class/devfreq/*/max_freq - alphabetical order returns dmc (924 MHz) before ff400000.gpu (600 MHz), so logs showed GPU=924MHz instead of GPU=600MHz. Fixed to use name-pattern loop matching gpu/mali/ff400000.
• Fix: ValidateUndervolt() showed empty temperature fields when CPU stress thermal-aborted. StressTestCPU now exports partial temp stats before returning exit code 1.

v3.8 — OPP bin detection rewrite + glmark2 persistent install

v3.8 — 2026-05-23

OPP bin detection rewritten — important reliability fix:

• Fix: DetectOPPBinProp() now uses a three-tier fallback instead of guessing from /proc/device-tree. Previous fallback iterated L0-L3 and took the first bin that existed in the DTB — since all bins are present in the DTB, this always returned L0 regardless of the active bin. New priority order: (1) dmesg (authoritative) -> (2) cache file /etc/r36_tuner_bin (persists across dmesg rotation) -> (3) generic opp-microvolt with abort (safe, no wrong-bin patch).
• Fix: Bin detected from dmesg is now saved to /etc/r36_tuner_bin. A single clean boot populates the cache permanently — future runs use the cache even if dmesg has rotated.
• Fix: If neither dmesg nor cache can provide the bin, all five patching paths (CPU UV, GPU UV, CPU OC, GPU OC, RAM OC) abort with a clear message: "Reboot the device — bin will be detected and cached automatically." Previously, the wrong bin (L0) was silently patched.
• Fix: CPU OC, GPU OC and RAM OC info screens now show the bin-not-detected warning inline. If OC is not active and bin is unknown, dialog shows [OK] instead of [Yes]/[No] — user sees the OC state but cannot patch until reboot.
• Fix: glmark2 legacy binary now installed to /usr/local/bin/ (persistent). Previously extracted to /tmp/ on every session — cleared on each reboot, causing re-extraction delay on first GPU benchmark use after every boot.

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Previous releases: v3.7 | v3.5

v3.6 — UI overhaul: clean menus, pixel-perfect heights, full OC+UV suite

What's new in v3.6

UI overhaul

• Main menu header removed — values were stale; live values already shown per menu item
• Voltage Info menu removed — runtime values are read-only and shown in each relevant menu
• All dialog heights fixed — every msgbox, yesno, and menu now has zero blank rows (formula-verified across 60+ dialogs)
• Dynamic heights — GPU/CPU UV mode, fine-tune, and confirm dialogs compute height at runtime based on OPP count and bin level
• Governor and DTB Tuning menus — list size now computed dynamically
• UI text consistency — ARM: capitalised, profile status ✗/✓ icons, title typos fixed

What this tool does

First (and only) TUI tuner for the R36S with:

• CPU Undervolt — per-OPP or uniform offset, 12.5 mV steps, full preview before applying
• GPU Undervolt — same, for vdd_logic / GPU OPP table
• CPU OC 1608 MHz — unlocks via DTB OPP node + avs-scale=0 (no kernel compile)
• GPU OC 600 MHz — gpll/2 exact, voltage selectable
• DMC / RAM OC 924 MHz — ATF v0x105 confirmed, +18% bandwidth
• Safety net — auto-restores original DTB if reboot hangs; profile fail-safe at boot
• Benchmarks — CPU ALU, RAM bandwidth, glmark2 GPU (off-screen + on-screen terrain), stress test, validation suite
• Real-time monitor — CPU/GPU/DMC freq + voltage + temp, live refresh
• Boot profiles — persist any combination of settings across reboots

Tested configuration (RK3326, L2 bin)

	Stock	OC+UV
CPU	1512 MHz	1608 MHz
GPU	520 MHz	600 MHz
DMC	786 MHz	924 MHz
Temp peak	72°C	72°C
glmark2 delta	—	+10% general / +20% terrain

Install

Or drop in to appear in dArkOSRE's Tools menu.

v3.5 — Full voltage freedom

v3.5 — Full voltage freedom

What changed

• All OC/UV menus now show the full hardware voltage range — no more hardcoded limits
  • CPU OC 1608 MHz: 950–1350 mV in 12.5 mV steps (was 4 fixed options)
  • GPU OC 600 MHz: 950–1150 mV in 12.5 mV steps (was 8 fixed options)
  • CPU UV / GPU UV uniform + fine-tune: -200 mV to +50 mV range
• Each menu shows your chip's current stock voltage as reference
• PMIC floor corrected to 950 mV (real hardware minimum)
• No recommended voltages — silicon lottery applies

Research findings (L2 bin, leakage=13 — your chip may differ)

• CPU OC 1608 MHz stable floor: 1187.5 mV (-112.5 mV vs stock 1300 mV)
  • Battery droop effect: low battery → voltage sag under load → instability at borderline voltages. Charge fully before sweeping.
• GPU UV fine-tune: 480 MHz → 962.5 mV, 520 MHz → 950 mV (PMIC floor) — both stable on-screen, no artifacts
  • Uniform UV was limited by 400 MHz OPP boot floor. Fine-tuning 480/520 individually allows much deeper UV.

Recommended flow

For overclocking: Enable CPU OC + GPU OC + RAM OC at safe voltages → reduce voltage gradually → stress test after each step

For battery/thermals: Use CPU Undervolt + GPU Undervolt on stock frequencies

These are findings from ONE chip. Start conservative. Your silicon may need more or less voltage.

v3.4 - GPU OC Voltage Sweep Complete

GPU OC 600 MHz - Voltage Sweep Complete

Full undervolt testing of the GPU OC 600 MHz feature across the entire stable range.

What's new

GPU OC voltage menu now covers the full range from 1150 mV down to 1025 mV.

Start at 1150 mV (safe) and reduce gradually. Test each step with a sustained GPU workload and visual inspection. Results depend on your specific chip - silicon lottery applies.

Reference data (one L2 bin chip)

Results below are from a single device (L2 bin, pvtm-volt-sel=2). Your chip may be more or less tolerant.

Voltage	FPS (on-screen)	Artifacts	Result
1150 mV	15	No	Stable
1112.5 mV	15	No	Stable
1087.5 mV	15	No	Stable
1062.5 mV	15	No	Stable
1037.5 mV	15	No	Stable
1025 mV	15	No	Stable (this chip)
1012.5 mV	13	Yes	Artifacts (this chip)

Total undervolt on this chip: -125 mV from PMIC max (1150 mV to 1025 mV).

Key findings

• GPU OC has much more undervolt headroom than stock GPU UV (which was limited to -12.5 mV at 520 MHz)
• Root cause: the 600 MHz OPP is a separate node - patching its voltage does NOT affect the 400/480/520 MHz OPPs. The old stock UV limit was caused by the 400 MHz OPP approaching the PMIC floor (950 mV).
• Crash behavior at too-low voltages: device boots normally (GPU stays at low freq during boot), artifacts/crash appear only when devfreq scales GPU to 600 MHz under load. Safety service does NOT trigger in this case.

Full research data

See docs/opp-research.md for complete OPP tables, sweep methodology, and crash behavior analysis.

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Tested on R36S / RK3326 / L2 silicon bin / dArkOSRE-R36

v3.1 — GPU OC 600 MHz + CPU OC 1608 MHz

What's new in v3.1

GPU OC 600 MHz — confirmed stable

The GPU clock uses gpll (1200 MHz) / 2 = 600 MHz exactly. Unlike CPU OC, there is no rockchip,avs-scale restriction — adding an opp-600000000 node to /gpu-opp-table in the DTB is sufficient. No kernel recompile needed.

Benchmark results (L2 bin, glmark2 terrain off-screen):

Condition	Freq	Voltage	FPS
Undervolted baseline	520 MHz	1087.5 mV	15–16
GPU OC	600 MHz	1150 mV	18

+20% FPS, stable at 62°C.

Voltage: 1150 mV (vdd_logic PMIC hard limit). Within rockchip,max-volt = 1175 mV.

vdd_logic is shared between GPU and all SoC logic. Undervolt margin is very tight — GPU OC uses the maximum safe voltage. Future work: find the minimum stable voltage at 600 MHz.

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CPU OC 1608 MHz — re-added to DTB menu (from v3.0)

The v1.8 implementation failed because rockchip,avs-scale=4 was silently stripping OPPs >1512 MHz at boot. The fix (avs-scale=0) is now correctly applied alongside the OPP node.

Menu: DTB Undervolt → CPU OC 1608 MHz [EXPERIMENTAL]
Voltage selector: 1350 / 1325 / 1300 / 1275 mV. Start conservative (1350 mV).

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Full OC/UV state on our test unit (L2 bin)

Component	Freq	Voltage	Status
CPU	1512 MHz	1175 mV (−125 mV UV)	✅ Stable
CPU OC	1608 MHz	1350 mV	✅ Stable (+1.6% over 1512)
GPU	520 MHz	1087.5 mV (−12.5 mV UV)	✅ Stable
GPU OC	600 MHz	1150 mV	✅ Stable (+20% terrain fps)

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Silicon lottery applies. Results are specific to our L2 bin unit. Your device may differ — always start with conservative voltages and have an SD card reader available for recovery.

For full technical details see docs/opp-research.md.