drivers: spi: cc13xx_cc26xx.c: Doesn't Allow SPI Serial Clock Lower Than 2MHz

[dlim04]

Describe the bug

The CC13xx and CC26xx family of chips allow a SPI clock up "to 2MHz and higher". However, they also allow bit rates of significantly lower. This bit rate can be calculated using the following equation 1:

SSIn_CLK = PERDMACLK / [CPSDVSR * (1 + SCR)]

Where:

• SSIn_CLK is the Serial Clock output by a given Synchronous Serial Interface i.e. SSI1 or SSI2.
• PERDMACLK is the SSI clock source equivalent to the core clock frequency
• CPSDVSR (Clock prescale divisor) is the value for the SSI Clock Prescale register which takes even values from 2 to 254 inclusive
• SCR (Serial clock rate) is the value for the SSI Control 0 Register which takes values from 0 to 255 inclusive

Using this equation and referencing SSIConfigSetExpClk() in the TI SimpleLink HAL the possible values for SSIn_CLK with regard to CPSDVSR and SCR can be plotted as shown:

With a PERDMACLK of 48MHz, there is a possible range of Serial Clocks between 738Hz (where CPSDVSR = 254, SCR = 255) and 24MHz (where CPSDVSR = 2, SCR = 0).

When setting spi_cfg->frequency to a frequency below 2MHz spi_cc13xx_cc26xx_configure() hits a check that the frequency is above 2MHz and provides the error message "Frequencies lower than 2 MHz are not supported".

This was tested on a BeagleConnect Freedom (based on the TI CC1352P7) using the sdhc_spi driver which sets the SPI clock to 400kHz during SD card initialisation.

By removing the 2MHz check in spi_cc13xx_cc26xx.c the HAL can set a frequency of 400kHz and lower.

This issue has been present since the SPI driver was first added in f2eea2e.

To Reproduce

Steps to reproduce the behaviour:

1. Add an sdhc device to a samples/subsys/fs/fs_sample beagleconnect_freedom.overlay and enable it in a beagleconect_freedom.conf .overlay and .conf.
2. west build -b beagleconnect_freedom zephyr/samples/subsys/fs/fs_sample
3. west flash
4. Attach a serial terminal and the see error message: "Frequencies lower than 2 MHz are not supported"

Expected behaviour

The SPI clock should run at frequencies below 2MHz.

By removing the 2MHz check from spi_cc13xx_cc26xx_configure() and running the same code shows a successful SD card initialisation and write with a SPI clock of 400kHz as shown in the below oscilloscope capture:

D0: CS
D1: SCLK
D2: MISO
D3: MOSI

Impact

SDHC SPI doesn't work on CC13XX and CC26XX boards. The fix is known:

The proposed solution is to replace the check at line 83 in spi_cc13xx_cc26xx_configure() with:

if (config->frequency < CPU_FREQ / (254 * (255 + 1))) {
    LOG_ERR("Frequencies lower than %d Hz are not supported", CPU_FREQ / (254 * (255 + 1));
    return -EINVAL;
}

Logs and console output

Console output:

[00:00:00.001,281] <err> spi_cc13xx_cc26xx: Frequencies lower than 2 MHz are not supported
[00:00:00.001,281] <err> sdhc_spi: Card SCLK init sequence failed
[00:00:00.001,312] <err> sd: Could not disable card power via SDHC
[00:00:00.001,312] <err> main: Storage init ERROR!
[00:00:00.002,441] <err> spi_cc13xx_cc26xx: Frequencies lower than 2 MHz are not supported
[00:00:00.002,441] <err> sdhc_spi: Card SCLK init sequence failed
[00:00:00.002,441] <err> sd: Could not disable card power via SDHC
[00:00:00.002,471] <err> fs: fs mount error (-5)
Error mounting disk.
[00:00:00.002,532] <err> fs: fs not mounted (mp == 0x20000000)

An additional oscilloscope captures the CC1352P7 providing a "740Hz" clock rate.

D0: CS
D1: SCLK
D2: MISO
D3: MOSI

Environment (please complete the following information):

• Target: beagleconnect_freedom
• OS: Ubuntu 22.04.4 LTS
• Toolchain: Zephyr SDK v0.16.5
• Commit SHA or Version used: v3.6.0

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