Add support for Synaptics SR100 SoCs #100172

aweissel · 2025-11-27T14:33:19Z

Add support for Synaptics SR100 SoCs, the Astra Machina Micro (RDK) board, Synaptics-specific drivers.
Add clock control support to a few Synopsys Designware drivers.

github-actions · 2025-11-27T14:34:00Z

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nordicjm

Issues have been pointed out at their first notice, other parts have not been go through whole PR and fix all instances of issues before requesting review

nordicjm · 2025-12-01T06:52:41Z

drivers/clock_control/Kconfig

 source "drivers/clock_control/Kconfig.xec"
 # zephyr-keep-sorted-stop

+source "drivers/clock_control/Kconfig.syna"


don't add files purposely outside the ordered list

nordicjm · 2025-12-01T06:53:01Z

drivers/clock_control/clock_control_syna.c

+	const struct clock_control_syna_config *config = dev->config;
+	uint32_t parent_rate = PLL0_RATE;
+	uint32_t offset = syna_get_cgl_offset(config, id);
+	uint32_t divider = 5, div3_switch = 0;


not compliant with coding standards, one variable declaration per line

nordicjm · 2025-12-01T06:53:30Z

drivers/clock_control/clock_control_syna.c

+
+	value = syna_clk_read(config, offset);
+	value &= ~(0x1f << 2);
+	value |= (div3_switch << 3); /* div3 switch */


why is a comment needed saying the variable, which is clearly visible in the math in the line itself?

nordicjm · 2025-12-01T06:53:53Z

drivers/clock_control/clock_control_syna.c

+			sel_val = value >> 4; /* read sel value */
+		}
+		switch (sel_val) {
+		case 1:


magic numbers

nordicjm · 2025-12-01T06:55:05Z

dts/arm/syna/sr100_b0.dtsi

+		};
+
+		ns16550_uart0: uart@50317000 {
+			compatible = "ns16550","snps,dw-apb-uart";


missing space after , (the one between both compatibles, not inside the compatible) @kylebonnici

Not sure why the annotation did not show but the linter did flag this see https://github.com/zephyrproject-rtos/zephyr/actions/runs/19739668990/job/56761834470

nordicjm · 2025-12-01T06:56:48Z

soc/syna/sr100/Kconfig.defconfig

+	default 128
+
+config SYS_CLOCK_HW_CYCLES_PER_SEC
+	default 400000000


needs to come from DTS using dt functions

nordicjm · 2025-12-01T06:57:11Z

boards/syna/sr100/Kconfig.sr100_rdk

+# SPDX-License-Identifier: Apache-2.0
+
+config BOARD_SR100_RDK
+	bool


Suggested change

bool

nordicjm · 2025-12-01T06:57:49Z

drivers/watchdog/Kconfig.syna

+	default 1000
+	range 1 $(UINT32_MAX)
+	help
+		Sets the initial timeout value for WDT in ms if enabled at boot.


wrong indent

nordicjm · 2025-12-01T06:58:08Z

dts/arm/syna/sr100_b0.dtsi

+			compatible = "syna,watchdog";
+			reg = <0x50350038 0x4>,
+					<0x58040000 0x1000>,
+					<0x58041000 0x1000>,


wrong indent

drivers/usb/udc/udc_dwc2.c

drivers/usb/udc/udc_dwc2.h

boards/syna/sr100/sr100_rdk.yaml

addressed

This adds the clock control driver for Synaptics SR100-series SoCs. Signed-off-by: Łukasz Kędziora <lkedziora@antmicro.com> Signed-off-by: Piotr Zierhoffer <pzierhoffer@antmicro.com> Signed-off-by: Andreas Weissel <andreas.weissel@synaptics.com>

This adds the pinctrl driver for Synaptics SR100-series SoCs. Signed-off-by: Łukasz Kędziora <lkedziora@antmicro.com> Signed-off-by: Piotr Zierhoffer <pzierhoffer@antmicro.com> Signed-off-by: Andreas Weissel <andreas.weissel@synaptics.com>

This adds the driver for the AON GPO block present on Synaptics SR100-series SoCs. Signed-off-by: Łukasz Kędziora <lkedziora@antmicro.com> Signed-off-by: Piotr Zierhoffer <pzierhoffer@antmicro.com> Signed-off-by: Andreas Weissel <andreas.weissel@synaptics.com>

This adds the soc files for the Synaptics SR100 SoC. Signed-off-by: Łukasz Kędziora <lkedziora@antmicro.com> Signed-off-by: Piotr Zierhoffer <pzierhoffer@antmicro.com> Signed-off-by: Andreas Weissel <andreas.weissel@synaptics.com>

This adds support for the SR100-RDK board. Signed-off-by: Łukasz Kędziora <lkedziora@antmicro.com> Signed-off-by: Piotr Zierhoffer <pzierhoffer@antmicro.com> Signed-off-by: Andreas Weissel <andreas.weissel@synaptics.com>

This adds the driver for watchdog used on the Synaptics SR100-series SoCs. Signed-off-by: Łukasz Kędziora <lkedziora@antmicro.com> Signed-off-by: Piotr Zierhoffer <pzierhoffer@antmicro.com> Signed-off-by: Andreas Weissel <andreas.weissel@synaptics.com>

This adds Synaptics Watchdog devicetree entries for the sr100_b0 SoC. Signed-off-by: Łukasz Kędziora <lkedziora@antmicro.com> Signed-off-by: Piotr Zierhoffer <pzierhoffer@antmicro.com> Signed-off-by: Andreas Weissel <andreas.weissel@synaptics.com>

This enables the Synaptics Watchdog devicetree node for the SR100 RDK board. Signed-off-by: Łukasz Kędziora <lkedziora@antmicro.com> Signed-off-by: Piotr Zierhoffer <pzierhoffer@antmicro.com> Signed-off-by: Andreas Weissel <andreas.weissel@synaptics.com>

This commit adds OpenOCD configuration for the SR100-RDK board. Signed-off-by: Filip Kokosinski <fkokosinski@antmicro.com> Signed-off-by: Piotr Zierhoffer <pzierhoffer@antmicro.com> Signed-off-by: Andreas Weissel <andreas.weissel@synaptics.com>

sonarqubecloud · 2025-12-09T09:36:41Z

Quality Gate passed

Issues
0 New issues
0 Accepted issues

Measures
0 Security Hotspots
0.0% Coverage on New Code
0.0% Duplication on New Code

See analysis details on SonarQube Cloud

zephyrbot added area: SPI SPI bus area: USB Universal Serial Bus area: Watchdog Watchdog area: Clock Control area: Boards/SoCs area: I2C area: Devicetree Bindings area: Pinctrl labels Nov 27, 2025

zephyrbot requested review from decsny, gmarull, jfischer-no, josuah, katsuster, martinjaeger, nordic-krch, tbursztyka, teburd and tmon-nordic November 27, 2025 14:35

zephyrbot assigned nordic-krch Nov 27, 2025

nordicjm requested changes Dec 1, 2025

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aweissel force-pushed the synaptics branch from f6ea540 to 2ead841 Compare December 1, 2025 13:01

aweissel requested a review from nordicjm December 3, 2025 09:53

aweissel force-pushed the synaptics branch from 2ead841 to 3df2feb Compare December 3, 2025 10:21

jfischer-no previously requested changes Dec 4, 2025

View reviewed changes

aweissel force-pushed the synaptics branch 2 times, most recently from c55f32c to bbfb10a Compare December 4, 2025 13:56

josuah mentioned this pull request Dec 4, 2025

drivers: usb: dwc2: Add support for Synaptics SR100 SoCs #100527

Open

aweissel force-pushed the synaptics branch from bbfb10a to cd2604d Compare December 5, 2025 17:26

jfischer-no reviewed Dec 8, 2025

View reviewed changes

boards/syna/sr100/sr100_rdk.yaml Outdated Show resolved Hide resolved

aweissel force-pushed the synaptics branch from cd2604d to 0ab56be Compare December 8, 2025 16:46

lkedziora and others added 9 commits December 9, 2025 10:09

soc: Add support for Synaptics SR100

bfd9f81

This adds the soc files for the Synaptics SR100 SoC. Signed-off-by: Łukasz Kędziora <lkedziora@antmicro.com> Signed-off-by: Piotr Zierhoffer <pzierhoffer@antmicro.com> Signed-off-by: Andreas Weissel <andreas.weissel@synaptics.com>

boards: arm: Add support for Synaptics SR100-RDK

f4dae87

This adds support for the SR100-RDK board. Signed-off-by: Łukasz Kędziora <lkedziora@antmicro.com> Signed-off-by: Piotr Zierhoffer <pzierhoffer@antmicro.com> Signed-off-by: Andreas Weissel <andreas.weissel@synaptics.com>

aweissel force-pushed the synaptics branch from 0ab56be to 09701f3 Compare December 9, 2025 09:09

This was referenced Dec 11, 2025

drivers: i2c_dw: Add clock control #100869

Open

drivers: spi_dw: Add clock control #100870

Open

Add support for Synaptics SR100 SoCs #100172

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Add support for Synaptics SR100 SoCs #100172

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aweissel commented Nov 27, 2025

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kylebonnici Dec 1, 2025 • edited Loading Uh oh! There was an error while loading. Please reload this page.

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sonarqubecloud bot commented Dec 9, 2025

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kylebonnici Dec 1, 2025 •

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