linker: Introduce zephyr,memory-region compatible

[carlocaione]

Introduce a new zephyr,memory-region compatible to be used when a new memory region must be created in the linker script from the devicetree node using the compatible.

Remove also the LINKER_DT_REGION_FROM_NODE macro and add a new LINKER_DT_REGION macro to cycle through all the compatible regions.

This is a preparatory work to be integrated with #41223 so that under one single compatible we have all the properties to create a new region in the linker script and set the MPU properties of the region using the info coming from the DT.

[JordanYates]

AFAICT we've lost the rw or rwx attributes on the memory regions with this PR.
I suspect we'll need an additional property called zephyr,memory-region-attr or similar

[gmarull]

One minor documentation comment

[carlocaione]

@tejlmand can you take a look?

[tejlmand]

Great work.

We need to be able to be able to fetch all zephyr,memory-region compatibles in same way here:

zephyr/cmake/linker_script/arm/linker.cmake

Lines 37 to 50 in a03deb8

	# TI CCFG Registers
	zephyr_linker_dts_memory(NODELABEL ti_ccfg_partition FLAGS rwx)
	# Data & Instruction Tightly Coupled Memory
	zephyr_linker_dts_memory(CHOSEN "zephyr,itcm" FLAGS rw)
	zephyr_linker_dts_memory(CHOSEN "zephyr,dtcm" FLAGS rw)
	zephyr_linker_dts_memory(NODELABEL sram1 FLAGS rw)
	zephyr_linker_dts_memory(NODELABEL sram2 FLAGS rw)
	zephyr_linker_dts_memory(NODELABEL sram3 FLAGS rw)
	zephyr_linker_dts_memory(NODELABEL sram4 FLAGS rw)
	zephyr_linker_dts_memory(NODELABEL sdram1 FLAGS rw)
	zephyr_linker_dts_memory(NODELABEL sdram2 FLAGS rw)
	zephyr_linker_dts_memory(NODELABEL backup_sram FLAGS rw)

so that code can use same principle.

Everything else looks good.
Let me know if you would like me to take a look at it.

[carlocaione]

@tejlmand I gave it a shot (added 2 commits to implement what you requested).

@mbolivar-nordic you want probably take a look at this again.

[tejlmand]

Looks very good, thanks for putting this together.

A couple of very minor nits.

[tejlmand]

When testing with arty_a7_arm_designstart_m3 this code results in DTCM and ITCM being defined on the same line like this:

MEMORY
    {
    FLASH (rx) : ORIGIN = (0x0 + 0x0), LENGTH = (32*1K - 0x0)
    SRAM (wx) : ORIGIN = 0x20000000, LENGTH = (32 * 1K)
    "ITCM" : ORIGIN = 0, LENGTH = 32768 "DTCM" : ORIGIN = 536870912, LENGTH = 32768
    IDT_LIST (wx) : ORIGIN = 0xFFFFF7FF, LENGTH = 2K
    }

it's not invalid code, but would be nice if each could have their own line.

This looks very nice when using -DCONFIG_CMAKE_LINKER_GENERATOR=y 😉

[carlocaione]

Yeeeeah, problem is that adding a new line in a macro using the preprocessor is not trivial (or even feasible?). I'll try to see if there is any way to achieve that but IIRC I already tried in the past and failed.

[tejlmand]

I agree, not easy at all and I can't think of a solution, just wanted to mention it.

[mbolivar-nordic]

I'm happy with the devicetree portions; @tejlmand should decide about the build system parts.

One nonblocking suggestion for the script.

Thanks for your persistence, @carlocaione.

[tejlmand]

Looks good.

Thanks for the effort.