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dleach02
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boards: nordic: ipc: added dcache alignement #79596
dleach02
merged 1 commit into
zephyrproject-rtos:main
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doki-nordic:set-dcache-align
Oct 24, 2024
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The nRF54 and nRF92 chips has data cache, which means the ICMsg and ICBMsg must be configured to follow required cache alignment of the shared memory. The `dcache-alignement` needs to be defined for that. Signed-off-by: Dominik Kilian <Dominik.Kilian@nordicsemi.no>
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The nRF54 and nRF92 chips has data cache, which means the ICMsg and ICBMsg must be configured to follow required cache alignment of the shared memory. The `dcache-alignement` needs to be defined for that. Upstream PR: zephyrproject-rtos/zephyr#79596 Signed-off-by: Dominik Kilian <Dominik.Kilian@nordicsemi.no>
anangl
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Labels
area: Devicetree
area: IPC
Inter-Process Communication
area: Samples
Samples
DNM
This PR should not be merged (Do Not Merge)
platform: nRF
Nordic nRFx
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The nRF54 and nRF92 chips has data cache, which means the ICMsg and ICBMsg must be configured to follow required cache alignment of the shared memory.
The
dcache-alignementneeds to be defined for that.