arch: arm: arm_mpu_v7m: Fix unsupported Cortex-R access permission mode #85812
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This file previously defined an MPU access permission mode of 0x7 which corresponded to privileged read-only, unprivileged read-only, similar to mode 0x6. However, it appears that at least Cortex-R5 does not support this mode, defining 0x7 as UNP (Unpredictable) or a value which should not be used. This value was in turn referenced by the REGION_FLASH_ATTR macro, which caused the offending value to be used when a memory region was declared as DT_MEM_ARM(ATTR_MPU_FLASH) in the device tree, causing such regions to not work properly on Cortex-R5. Since 0x6 is supported by both Cortex-M and Cortex-R and does the same thing, there is no reason to use 0x7. Remove the RO_Msk definition which referenced it, and change REGION_FLASH_ATTR to use P_RO_U_RO_Msk instead. Signed-off-by: Robert Hancock <robert.hancock@calian.com>
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wearyzen
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Mar 3, 2025
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For others looking for reference, this is what I referred:
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Ping? Looks like this needs an additional review. |
JarmouniA
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Mar 15, 2025
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Ping - looks like this needs another review |
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Ping - needs another review |
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This file previously defined an MPU access permission mode of 0x7 which corresponded to privileged read-only, unprivileged read-only, similar to mode 0x6. However, it appears that at least Cortex-R5 does not support this mode, defining 0x7 as UNP (Unpredictable) or a value which should not be used.
This value was in turn referenced by the REGION_FLASH_ATTR macro, which caused the offending value to be used when a memory region was declared as DT_MEM_ARM(ATTR_MPU_FLASH) in the device tree, causing such regions to not work properly on Cortex-R5.
Since 0x6 is supported by both Cortex-M and Cortex-R and does the same thing, there is no reason to use 0x7. Remove the RO_Msk definition which referenced it, and change REGION_FLASH_ATTR to use P_RO_U_RO_Msk instead.