enable SDHC support on imx93 Cortex-A Core platform #87635
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boards/nxp/imx93_evk/doc/index.rst
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| This board configuration uses a single serial communication channel with the | ||
| CPU's UART2 for A55 core and M33 core. | ||
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| uSDHC (SD or eMMC Interface) |
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Assuming this can't be enabled on the board by default (is this USDHC interface shared with Linux/Uboot?)- can we add some form of testcase definition in tests/subsys/sd/sdmmc to validate that the subsystem works on this board?
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Hi, @danieldegrasse, good catch, currently we rely on uboot or linux to start A-core zephyr, so Zephyr can't use the same uSDHC controller with uboot or Linux, that is to say:
- if board is booted from SD Card (which uses uSDHC2), so we only could use uSDHC1 for Zephyr
tests/subsys/sd/mmctesting. - if board is booted from mmc (which uses uSDHC1), so we only could use uSDHC2 for Zephyr
tests/subsys/sd/sdmmctesting
I will update this document and provides overlay for both uSDHC controllers to address this issues, thanks.
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V2: Addressed @danieldegrasse's comments, added two overlay for each uSDHC controller, and updated document to address need to avoid conflict with U-Boot and Linux. |
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Format the driver by using clang-format. Signed-off-by: Jiafei Pan <Jiafei.Pan@nxp.com>
Enable MMIO mapping in the driver. Signed-off-by: Jiafei Pan <Jiafei.Pan@nxp.com>
Add device nodes for SDHC. Signed-off-by: Jiafei Pan <Jiafei.Pan@nxp.com>
Some drivers need header file soc.h, according to Zephyr SoC Porting Guide soc.h must be provided for each SoC, so created an empty one. Signed-off-by: Jiafei Pan <Jiafei.Pan@nxp.com>
Added pinctrl and dts nodes for uSDHC1 and uSDHC2, they are disabled by default, and provided overlay files to enable them if needed. Signed-off-by: Jiafei Pan <Jiafei.Pan@nxp.com> Signed-off-by: Lei Xu <lei.xu@nxp.com>
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Rebased and removed west.yaml update as current commit of hal_nxp hal already included the update which this PR depends on. |
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Depend on zephyrproject-rtos/hal_nxp#524, it has been merged.