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fix potential speculative access that might trigger bus faults on Cortex-M7 #90305

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Merged
kartben merged 2 commits into from
May 29, 2025
Merged

fix potential speculative access that might trigger bus faults on Cortex-M7 #90305

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e893887
soc: nxp: s32k3: fix erratum ERR011573
manuargue May 15, 2025
cd3a876
arch: arm: mpu: fix erratum 1013783-B
manuargue May 16, 2025
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14 changes: 12 additions & 2 deletions arch/arm/core/mpu/arm_mpu_regions.c
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Original file line number Diff line number Diff line change
@@ -1,5 +1,6 @@
/*
* Copyright (c) 2017 Linaro Limited.
* Copyright 2025 NXP
*
* SPDX-License-Identifier: Apache-2.0
*/
Expand All @@ -10,8 +11,18 @@
#include <zephyr/arch/arm/cortex_m/arm_mpu_mem_cfg.h>

static const struct arm_mpu_region mpu_regions[] = {

#if defined(CONFIG_CPU_CORTEX_M7) && defined(CONFIG_CPU_HAS_ARM_MPU) && \
defined(CONFIG_CPU_HAS_DCACHE)
/* Erratum 1013783-B (SDEN-1068427): use first region to prevent speculative access
* in entire memory space
*/
MPU_REGION_ENTRY("BACKGROUND",
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@wearyzen wearyzen May 29, 2025

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nit: "UNMAPPED" would be a better name

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@manuargue manuargue May 29, 2025

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I didn’t get to address this due to the timezone difference, already merged :)

0,
{REGION_4G | MPU_RASR_XN_Msk | P_NA_U_NA_Msk}),
#endif

#ifdef CONFIG_XIP
/* Region 0 */
MPU_REGION_ENTRY("FLASH_0",
CONFIG_FLASH_BASE_ADDRESS,
#if defined(CONFIG_ARMV8_M_BASELINE) || defined(CONFIG_ARMV8_M_MAINLINE)
Expand All @@ -22,7 +33,6 @@ static const struct arm_mpu_region mpu_regions[] = {
#endif
#endif

/* Region 1 */
MPU_REGION_ENTRY("SRAM_0",
CONFIG_SRAM_BASE_ADDRESS,
#if defined(CONFIG_ARMV8_M_BASELINE) || defined(CONFIG_ARMV8_M_MAINLINE)
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9 changes: 8 additions & 1 deletion soc/nxp/s32/s32k3/mpu_regions.c
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Original file line number Diff line number Diff line change
@@ -1,5 +1,5 @@
/*
* Copyright 2023 NXP
* Copyright 2023, 2025 NXP
*
* SPDX-License-Identifier: Apache-2.0
*/
Expand All @@ -14,6 +14,13 @@ extern char _rom_attr[];

static struct arm_mpu_region mpu_regions[] = {

/* ERR011573: use first region to prevent speculative access in entire memory space */
{
.name = "BACKGROUND",
.base = 0,
.attr = {REGION_4G | MPU_RASR_XN_Msk | P_NA_U_NA_Msk},
},

/* Keep before CODE region so it can be overlapped by SRAM CODE in non-XIP systems */
{
.name = "SRAM",
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