boards: lilygo: ttgo_t3stm32: initial support

boards/lilygo/ttgo_t3stm32/Kconfig.ttgo_t3stm32

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+# Copyright 2025 Lothar Felten <lothar.felten@gmail.com>
+# SPDX-License-Identifier: Apache-2.0
+
+config BOARD_TTGO_T3STM32
+	select SOC_STM32WL55XX

boards/lilygo/ttgo_t3stm32/board.cmake

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+# SPDX-License-Identifier: Apache-2.0
+
+board_runner_args(stm32flash "--baud-rate=115200" "--start-addr=0x08000000" "--device=/dev/ttyACM0")
+
+include(${ZEPHYR_BASE}/boards/common/stm32flash.board.cmake)
+include(${ZEPHYR_BASE}/boards/common/openocd.board.cmake)

boards/lilygo/ttgo_t3stm32/board.yml

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+board:
+  name: ttgo_t3stm32
+  full_name: TTGO T3-STM32
+  vendor: lilygo
+  socs:
+    - name: stm32wl55xx

boards/lilygo/ttgo_t3stm32/doc/index.rst

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+.. zephyr:board:: ttgo_t3stm32
+
+Overview
+********
+
+The Lilygo TTGO T3-STM32 is a development board for LoRa applications based on the
+STMicroelectronics STM32WL55 ARM Cortex-M4/Cortex-M0+ dual core MCU.
+
+It features the following integrated components:
+
+- STM32WL55 MCU (48MHz dual core M4/M0+, 256kB flash, 64kB RAM, LPWAN RF)
+- SSD1315, 128x64 px, 0.96" OLED screen
+- SD card
+- JST PH 2-pin battery connector
+- two LEDs
+
+Some of the MCUs I/O pins are accessible on the board's pin headers.
+
+Hardware
+********
+
+Supported Features
+==================
+
+.. zephyr:board-supported-hw::
+
+Start Application Development
+*****************************
+
+Before powering up your Lilygo TTGO T3-STM32, please make sure that the board is in good
+condition with no obvious signs of damage.
+
+Flashing
+********
+
+Flashing requires the `stm32flash tool`_.
+
+Building stm32flash command line tool
+=====================================
+
+To build the stm32flash tool, follow the steps below:
+
+#. Checkout the stm32flash tool's code from the repository.
+
+  .. code-block:: console
+
+     $ git clone http://git.code.sf.net/p/stm32flash/code stm32flash
+     $ cd stm32flash
+
+#. Build the stm32flash tool.
+
+  .. code-block:: console
+
+     $ make
+
+#. The resulting binary is available at :file:`stm32flash`.
+
+Flashing an Application
+=======================
+
+To upload an application to the Lilygo TTGO T3-STM32, connect the board via the
+USB Type-C connector, the device will enumerate as a virtual com port.
+This tutorial uses the :zephyr:code-sample:`hello_world` sample application.
+
+#. Press the reset button while holding the boot button.
+
+#. To build the application and flash it, enter:
+
+   .. zephyr-app-commands::
+      :zephyr-app: samples/hello_world
+      :board: t3_stm32
+      :goals: flash
+
+#. Run your favorite terminal program to listen for output.
+
+   .. code-block:: console
+
+      $ minicom -D /dev/ttyACM0 -b 115200
+
+   The :code:`-b` option sets baud rate ignoring the value
+   from config.
+
+#. Press the Reset button and you should see the output of
+   the hello world application in your terminal.
+
+.. note::
+   Make sure your terminal program is closed before flashing
+   the binary image, or it will interfere with the flashing
+   process.
+
+Code samples
+============
+
+The following sample applications will work out of the box with this board:
+
+* :zephyr:code-sample:`hello_world`
+* :zephyr:code-sample:`blinky`
+* :zephyr:code-sample:`lora-send`
+* :zephyr:code-sample:`lora-receive`
+* :zephyr-app: samples/subsys/fs/fs_sample
+
+Related Documents
+*****************
+- `Lilygo TTGO T3STM32 schematic <https://github.com/Xinyuan-LilyGO/T3-STM32/blob/master/hardware/T3_STM32 V1.0%2024-07-30.pdf>`_ (PDF)
+- `Lilygo TTGO T3STM32 documentation <https://github.com/Xinyuan-LilyGO/T3-STM32>`_
+- `Lilygo github repo <https://github.com/Xinyuan-LilyGo>`_
+- `STM32WL55JC datasheet <https://www.st.com/resource/en/datasheet/stm32wl55jc.pdf>`_ (PDF)
+- `STM32WL55JC MCU documentation <https://www.st.com/en/microcontrollers-microprocessors/stm32wl55jc.html>`_
+- `stm32flash tool <https://sourceforge.net/p/stm32flash/wiki/Home>`_
+- `SSD1315 datasheet <https://github.com/Xinyuan-LilyGO/T3-STM32/blob/master/hardware/SSD1315.pdf>`_ (PDF)

boards/lilygo/ttgo_t3stm32/support/openocd.cfg

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+source [find interface/stlink.cfg]
+
+transport select hla_swd
+
+source [find target/stm32wlx.cfg]
+
+# Debug compatible reset configuration (default)
+reset_config srst_only srst_nogate
+
+# Sleep mode compatible reset configuration (stock firmware compatible)
+# reset_config srst_only srst_nogate connect_assert_srst

boards/lilygo/ttgo_t3stm32/ttgo_t3stm32.dts

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+/*
+ * Copyright 2025 Lothar Felten <lothar.felten@gmail.com>
+ *
+ * SPDX-License-Identifier: Apache-2.0
+ */
+
+/dts-v1/;
+#include <st/wl/stm32wl55Xc.dtsi>
+#include <st/wl/stm32wl55jcix-pinctrl.dtsi>
+
+/ {
+	model = "Lilygo TTGO T3-STM32";
+	compatible = "lilygo,ttgo-t3stm32";
+
+	aliases {
+		led0 = &red_led;
+		led1 = &green_led;
+		lora0 = &lora;
+		watchdog0 = &iwdg;
+		die-temp0 = &die_temp;
+		volt-sensor0 = &vref;
+		volt-sensor1 = &vbat;
+	};
+
+	chosen {
+		zephyr,console = &usart1;
+		zephyr,shell-uart = &usart1;
+		zephyr,sram = &sram0;
+		zephyr,flash = &flash0;
+		zephyr,code-partition = &slot0_partition;
+	};
+
+	leds: leds {
+		compatible = "gpio-leds";
+
+		red_led: led-0 {
+			gpios = <&gpioa 0 GPIO_ACTIVE_HIGH>;
+			label = "User LED0";
+		};
+
+		green_led: led-1 {
+			gpios = <&gpioa 1 GPIO_ACTIVE_HIGH>;
+			label = "User LED1";
+		};
+	};
+
+	zephyr,user {
+		io-channels = <&adc1 2>, <&adc1 3>;
+	};
+};
+
+&clk_lsi {
+	status = "okay";
+};
+
+stm32_lp_tick_source: &lptim1 {
+	clocks = <&rcc STM32_CLOCK_BUS_APB1 0x80000000>,
+		 <&rcc STM32_SRC_LSI LPTIM1_SEL(1)>;
+	status = "okay";
+};
+
+&clk_hsi {
+	status = "okay";
+};
+
+&clk_lse {
+	status = "okay";
+};
+
+&pll {
+	div-m = <1>;
+	mul-n = <6>;
+	div-r = <2>;
+	div-q = <2>;
+	clocks = <&clk_hsi>;
+	status = "okay";
+};
+
+&rcc {
+	clocks = <&pll>;
+	clock-frequency = <DT_FREQ_M(48)>;
+	cpu1-prescaler = <1>;
+	cpu2-prescaler = <1>;
+	ahb3-prescaler = <1>;
+	apb1-prescaler = <1>;
+	apb2-prescaler = <1>;
+};
+
+&usart1 {
+	pinctrl-0 = <&usart1_tx_pa9 &usart1_rx_pa10>;
+	pinctrl-names = "default";
+	current-speed = <115200>;
+	status = "okay";
+};
+
+&die_temp {
+	status = "okay";
+};
+
+&aes {
+	status = "okay";
+};
+
+&rng {
+	status = "okay";
+};
+
+&iwdg {
+	status = "okay";
+};
+
+&adc1 {
+	pinctrl-0 = <&adc_in2_pb3 &adc_in3_pb4>;
+	pinctrl-names = "default";
+	st,adc-clock-source = "SYNC";
+	st,adc-prescaler = <4>;
+	status = "okay";
+};
+
+&spi1 {
+	pinctrl-0 = <&spi1_nss_pa4 &spi1_sck_pa5
+		&spi1_miso_pa6 &spi1_mosi_pa7>;
+	pinctrl-names = "default";
+
+	status = "okay";
+	cs-gpios = <&gpioa 4 GPIO_ACTIVE_LOW>;
+
+	sdhc0: sdhc@0 {
+		compatible = "zephyr,sdhc-spi-slot";
+		reg = <0>;
+		status = "okay";
+		mmc {
+			compatible = "zephyr,sdmmc-disk";
+			disk-name = "SD";
+			status = "okay";
+		};
+		spi-max-frequency = <24000000>;
+	};
+};
+
+&subghzspi {
+	status = "okay";
+
+	lora: radio@0 {
+		status = "okay";
+		tx-enable-gpios = <&gpiob 2 GPIO_ACTIVE_LOW>; /* FE_CTRL1 */
+		rx-enable-gpios = <&gpiob 6 GPIO_ACTIVE_LOW>; /* FE_CTRL2 */
+		dio3-tcxo-voltage = <SX126X_DIO3_TCXO_1V7>;
+		tcxo-power-startup-delay-ms = <5>;
+		/* High-power output is selected as a consequence of using
+		 * tx/rx-enable-gpio to control FE_CTRL1 and FE_CTRL2. Low-power
+		 * output would require both FE_CTRL1 and FE_CTRL2 to be high,
+		 * which is not currently supported by the driver.
+		 */
+		power-amplifier-output = "rfo-hp";
+		rfo-lp-max-power = <15>;
+		rfo-hp-max-power = <22>;
+	};
+};
+
+&flash0 {
+	partitions {
+		compatible = "fixed-partitions";
+		#address-cells = <1>;
+		#size-cells = <1>;
+
+		boot_partition: partition@0 {
+			label = "mcuboot";
+			reg = <0x00000000 DT_SIZE_K(32)>;
+			read-only;
+		};
+
+		slot0_partition: partition@8000 {
+			label = "image-0";
+			reg = <0x00008000 DT_SIZE_K(104)>;
+		};
+
+		slot1_partition: partition@22000 {
+			label = "image-1";
+			reg = <0x00022000 DT_SIZE_K(104)>;
+		};
+
+		/*
+		 * Set 16kB of storage (8x2kB pages) at the end of the 256kB of
+		 * flash.
+		 */
+		storage_partition: partition@3c000 {
+			label = "storage";
+			reg = <0x0003c000 DT_SIZE_K(16)>;
+		};
+	};
+};
+
+&rtc {
+	clocks = <&rcc STM32_CLOCK_BUS_APB1 0x00000400>,
+		 <&rcc STM32_SRC_LSE RTC_SEL(1)>;
+	status = "okay";
+};
+
+&vref {
+	status = "okay";
+};
+
+&vbat {
+	status = "okay";
+};

boards/lilygo/ttgo_t3stm32/ttgo_t3stm32.yaml

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+identifier: ttgo_t3stm32
+name: TTGO T3-STM32
+type: mcu
+arch: arm
+toolchain:
+  - zephyr
+  - gnuarmemb
+ram: 64
+flash: 256
+supported:
+  - gpio
+  - spi
+  - adc
+  - watchdog
+  - nvs
+  - lora
+  - rtc
+vendor: lilygo

boards/lilygo/ttgo_t3stm32/ttgo_t3stm32_defconfig

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+# SPDX-License-Identifier: Apache-2.0
+
+CONFIG_CONSOLE=y
+CONFIG_SERIAL=y
+CONFIG_UART_CONSOLE=y
+
+CONFIG_ARM_MPU=y
+CONFIG_HW_STACK_PROTECTION=y
+
+CONFIG_GPIO=y