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stm32hal: Fixes source address control #99352

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68255e6
drivers: ethernet: Run clang-format before applying a patch
mrjimenez Nov 13, 2025
aaeb91e
drivers: ethernet: stm32hal: Fixes source address control
mrjimenez Nov 14, 2025
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40 changes: 18 additions & 22 deletions drivers/ethernet/eth_stm32_hal_v1.c
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Original file line number Diff line number Diff line change
Expand Up @@ -31,10 +31,8 @@
uint32_t tmp = heth->Instance->MACFFR;

/* clear all multicast filter bits, resulting in perfect filtering */
tmp &= ~(ETH_MULTICASTFRAMESFILTER_PERFECTHASHTABLE |
ETH_MULTICASTFRAMESFILTER_HASHTABLE |
ETH_MULTICASTFRAMESFILTER_PERFECT |
ETH_MULTICASTFRAMESFILTER_NONE);
tmp &= ~(ETH_MULTICASTFRAMESFILTER_PERFECTHASHTABLE | ETH_MULTICASTFRAMESFILTER_HASHTABLE |
ETH_MULTICASTFRAMESFILTER_PERFECT | ETH_MULTICASTFRAMESFILTER_NONE);

if (IS_ENABLED(CONFIG_ETH_STM32_MULTICAST_FILTER)) {
/* enable multicast hash receive filter */
Expand Down Expand Up @@ -134,8 +132,7 @@
total_len = heth->RxFrameInfos.length;
dma_buffer = (uint8_t *)heth->RxFrameInfos.buffer;

pkt = net_pkt_rx_alloc_with_buffer(dev_data->iface,
total_len, AF_UNSPEC, 0, K_MSEC(100));
pkt = net_pkt_rx_alloc_with_buffer(dev_data->iface, total_len, AF_UNSPEC, 0, K_MSEC(100));
if (!pkt) {
LOG_ERR("Failed to obtain RX buffer");
goto release_desc;
Expand All @@ -155,8 +152,7 @@
/* Set Own bit in Rx descriptors: gives the buffers back to DMA */
for (int i = 0; i < heth->RxFrameInfos.SegCount; i++) {
dma_rx_desc->Status |= ETH_DMARXDESC_OWN;
dma_rx_desc = (ETH_DMADescTypeDef *)
(dma_rx_desc->Buffer2NextDescAddr);
dma_rx_desc = (ETH_DMADescTypeDef *)(dma_rx_desc->Buffer2NextDescAddr);
}

/* Clear Segment_Count */
Expand Down Expand Up @@ -216,12 +212,12 @@
k_mutex_init(&dev_data->tx_mutex);
k_sem_init(&dev_data->rx_int_sem, 0, K_SEM_MAX_LIMIT);

if (HAL_ETH_DMATxDescListInit(heth, dma_tx_desc_tab,
&dma_tx_buffer[0][0], ETH_TXBUFNB) != HAL_OK) {
if (HAL_ETH_DMATxDescListInit(heth, dma_tx_desc_tab, &dma_tx_buffer[0][0], ETH_TXBUFNB) !=
HAL_OK) {
return -EIO;
}
if (HAL_ETH_DMARxDescListInit(heth, dma_rx_desc_tab,
&dma_rx_buffer[0][0], ETH_RXBUFNB) != HAL_OK) {
if (HAL_ETH_DMARxDescListInit(heth, dma_rx_desc_tab, &dma_rx_buffer[0][0], ETH_RXBUFNB) !=
HAL_OK) {
return -EIO;
}

Expand All @@ -239,6 +235,10 @@

heth->Init.Speed = PHY_LINK_IS_SPEED_100M(state->speed) ? ETH_SPEED_100M : ETH_SPEED_10M;

/* The default configuration is ETH_SOURCEADDRESS_REPLACE_ADDR0,
* which is bad for bridging. */

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drivers/ethernet/eth_stm32_hal_v1.c:239  Block comments use a trailing */ on a separate line

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drivers/ethernet/eth_stm32_hal_v1.c:239  Block comments use a trailing */ on a separate line
mac_config.SourceAddrControl = ETH_SOURCEADDRESS_DISABLE;

hal_ret = HAL_ETH_ConfigMAC(heth, NULL);
if (hal_ret != HAL_OK) {
LOG_ERR("HAL_ETH_ConfigMAC: failed: %d", hal_ret);
Expand Down Expand Up @@ -280,25 +280,21 @@
return 0;
}

int eth_stm32_hal_set_config(const struct device *dev,
enum ethernet_config_type type,
const struct ethernet_config *config)
int eth_stm32_hal_set_config(const struct device *dev, enum ethernet_config_type type,
const struct ethernet_config *config)
{
struct eth_stm32_hal_dev_data *dev_data = dev->data;
ETH_HandleTypeDef *heth = &dev_data->heth;

switch (type) {
case ETHERNET_CONFIG_TYPE_MAC_ADDRESS:
memcpy(dev_data->mac_addr, config->mac_address.addr, 6);
heth->Instance->MACA0HR = (dev_data->mac_addr[5] << 8) |
dev_data->mac_addr[4];
heth->Instance->MACA0HR = (dev_data->mac_addr[5] << 8) | dev_data->mac_addr[4];
heth->Instance->MACA0LR = (dev_data->mac_addr[3] << 24) |
(dev_data->mac_addr[2] << 16) |
(dev_data->mac_addr[1] << 8) |
dev_data->mac_addr[0];
(dev_data->mac_addr[2] << 16) |
(dev_data->mac_addr[1] << 8) | dev_data->mac_addr[0];
net_if_set_link_addr(dev_data->iface, dev_data->mac_addr,
sizeof(dev_data->mac_addr),
NET_LINK_ETHERNET);
sizeof(dev_data->mac_addr), NET_LINK_ETHERNET);
return 0;
#if defined(CONFIG_NET_PROMISCUOUS_MODE)
case ETHERNET_CONFIG_TYPE_PROMISC_MODE:
Expand Down
104 changes: 47 additions & 57 deletions drivers/ethernet/eth_stm32_hal_v2.c
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Open in desktop
Original file line number Diff line number Diff line change
Expand Up @@ -19,7 +19,7 @@

LOG_MODULE_DECLARE(eth_stm32_hal, CONFIG_ETHERNET_LOG_LEVEL);

#define ETH_DMA_TX_TIMEOUT_MS 20U /* transmit timeout in milliseconds */
#define ETH_DMA_TX_TIMEOUT_MS 20U /* transmit timeout in milliseconds */

struct eth_stm32_rx_buffer_header {
struct eth_stm32_rx_buffer_header *next;
Expand Down Expand Up @@ -94,7 +94,7 @@
buffer_header->used = false;
if (buffer_header->tx_buff.next != NULL) {
buffer_header = CONTAINER_OF(buffer_header->tx_buff.next,
struct eth_stm32_tx_buffer_header, tx_buff);
struct eth_stm32_tx_buffer_header, tx_buff);
} else {
buffer_header = NULL;
}
Expand Down Expand Up @@ -174,8 +174,8 @@
buf_header = &dma_tx_buffer_header[ctx->first_tx_buffer_index];

#if defined(CONFIG_PTP_CLOCK_STM32_HAL)
timestamped_frame = eth_stm32_is_ptp_pkt(net_pkt_iface(pkt), pkt) ||
net_pkt_is_tx_timestamping(pkt);
timestamped_frame =
eth_stm32_is_ptp_pkt(net_pkt_iface(pkt), pkt) || net_pkt_is_tx_timestamping(pkt);
if (timestamped_frame) {
/* Enable transmit timestamp */
if (HAL_ETH_PTP_InsertTxTimestamp(heth) != HAL_OK) {
Expand Down Expand Up @@ -275,8 +275,8 @@
buf_header = &dma_tx_buffer_header[ctx->first_tx_buffer_index];

#if defined(CONFIG_PTP_CLOCK_STM32_HAL)
timestamped_frame = eth_stm32_is_ptp_pkt(net_pkt_iface(pkt), pkt) ||
net_pkt_is_tx_timestamping(pkt);
timestamped_frame =
eth_stm32_is_ptp_pkt(net_pkt_iface(pkt), pkt) || net_pkt_is_tx_timestamping(pkt);
if (timestamped_frame) {
/* Enable transmit timestamp */
if (HAL_ETH_PTP_InsertTxTimestamp(heth) != HAL_OK) {
Expand Down Expand Up @@ -332,8 +332,7 @@
/* Wait for end of TX buffer transmission */
/* If the semaphore timeout breaks, it means */
/* an error occurred or IT was not fired */
if (k_sem_take(&dev_data->tx_int_sem,
K_MSEC(ETH_DMA_TX_TIMEOUT_MS)) != 0) {
if (k_sem_take(&dev_data->tx_int_sem, K_MSEC(ETH_DMA_TX_TIMEOUT_MS)) != 0) {

LOG_ERR("HAL_ETH_TransmitIT tx_int_sem take timeout");
res = -EIO;
Expand All @@ -342,25 +341,22 @@
/* Ethernet device was put in error state */
/* Error state is unrecoverable ? */
if (HAL_ETH_GetState(heth) == HAL_ETH_STATE_ERROR) {
LOG_ERR("%s: ETH in error state: errorcode:%x",
__func__,
LOG_ERR("%s: ETH in error state: errorcode:%x", __func__,
HAL_ETH_GetError(heth));
/* TODO recover from error state by restarting eth */
}

/* Check for DMA errors */
if (HAL_ETH_GetDMAError(heth) != 0U) {
LOG_ERR("%s: ETH DMA error: dmaerror:%x",
__func__,
LOG_ERR("%s: ETH DMA error: dmaerror:%x", __func__,
HAL_ETH_GetDMAError(heth));
/* DMA fatal bus errors are putting in error state*/
/* TODO recover from this */
}

/* Check for MAC errors */
if (HAL_ETH_GetMACError(heth) != 0U) {
LOG_ERR("%s: ETH MAC error: macerror:%x",
__func__,
LOG_ERR("%s: ETH MAC error: macerror:%x", __func__,
HAL_ETH_GetMACError(heth));
/* MAC errors are putting in error state*/
/* TODO recover from this */
Expand Down Expand Up @@ -411,8 +407,8 @@
}

/* computing total length */
for (rx_header = (struct eth_stm32_rx_buffer_header *)appbuf;
rx_header; rx_header = rx_header->next) {
for (rx_header = (struct eth_stm32_rx_buffer_header *)appbuf; rx_header;
rx_header = rx_header->next) {
total_len += rx_header->size;
}

Expand All @@ -423,15 +419,14 @@
}
#endif /* CONFIG_PTP_CLOCK_STM32_HAL */

pkt = net_pkt_rx_alloc_with_buffer(dev_data->iface,
total_len, AF_UNSPEC, 0, K_MSEC(100));
pkt = net_pkt_rx_alloc_with_buffer(dev_data->iface, total_len, AF_UNSPEC, 0, K_MSEC(100));
if (!pkt) {
LOG_ERR("Failed to obtain RX buffer");
goto release_desc;
}

for (rx_header = (struct eth_stm32_rx_buffer_header *)appbuf;
rx_header; rx_header = rx_header->next) {
for (rx_header = (struct eth_stm32_rx_buffer_header *)appbuf; rx_header;
rx_header = rx_header->next) {
const size_t index = rx_header - &dma_rx_buffer_header[0];

__ASSERT_NO_MSG(index < ETH_RXBUFNB);
Expand All @@ -444,8 +439,8 @@
}

release_desc:
for (rx_header = (struct eth_stm32_rx_buffer_header *)appbuf;
rx_header; rx_header = rx_header->next) {
for (rx_header = (struct eth_stm32_rx_buffer_header *)appbuf; rx_header;
rx_header = rx_header->next) {
rx_header->used = false;
}

Expand Down Expand Up @@ -479,7 +474,6 @@
__ASSERT_NO_MSG(dev_data != NULL);

k_sem_give(&dev_data->tx_int_sem);

}

void HAL_ETH_ErrorCallback(ETH_HandleTypeDef *heth)
Expand Down Expand Up @@ -509,24 +503,22 @@
dma_error = HAL_ETH_GetDMAError(heth);

#if DT_HAS_COMPAT_STATUS_OKAY(st_stm32h7_ethernet)
if ((dma_error & ETH_DMA_RX_WATCHDOG_TIMEOUT_FLAG) ||
(dma_error & ETH_DMA_RX_PROCESS_STOPPED_FLAG) ||
(dma_error & ETH_DMA_RX_BUFFER_UNAVAILABLE_FLAG)) {
if ((dma_error & ETH_DMA_RX_WATCHDOG_TIMEOUT_FLAG) ||
(dma_error & ETH_DMA_RX_PROCESS_STOPPED_FLAG) ||
(dma_error & ETH_DMA_RX_BUFFER_UNAVAILABLE_FLAG)) {
eth_stats_update_errors_rx(dev_data->iface);
}
if ((dma_error & ETH_DMA_EARLY_TX_IT_FLAG) ||
(dma_error & ETH_DMA_TX_PROCESS_STOPPED_FLAG)) {
(dma_error & ETH_DMA_TX_PROCESS_STOPPED_FLAG)) {
eth_stats_update_errors_tx(dev_data->iface);
}
#else
if ((dma_error & ETH_DMASR_RWTS) ||
(dma_error & ETH_DMASR_RPSS) ||
(dma_error & ETH_DMASR_RBUS)) {
if ((dma_error & ETH_DMASR_RWTS) || (dma_error & ETH_DMASR_RPSS) ||
(dma_error & ETH_DMASR_RBUS)) {
eth_stats_update_errors_rx(dev_data->iface);
}
if ((dma_error & ETH_DMASR_ETS) ||
(dma_error & ETH_DMASR_TPSS) ||
(dma_error & ETH_DMASR_TJTS)) {
if ((dma_error & ETH_DMASR_ETS) || (dma_error & ETH_DMASR_TPSS) ||
(dma_error & ETH_DMASR_TJTS)) {
eth_stats_update_errors_tx(dev_data->iface);
}
#endif /* DT_HAS_COMPAT_STATUS_OKAY(st_stm32h7_ethernet) */
Expand All @@ -540,12 +532,10 @@
eth_stats_update_errors_rx(dev_data->iface);
}

if ((mac_error & ETH_EXECESSIVE_COLLISIONS) ||
(mac_error & ETH_LATE_COLLISIONS) ||
(mac_error & ETH_EXECESSIVE_DEFERRAL) ||
(mac_error & ETH_TRANSMIT_JABBR_TIMEOUT) ||
(mac_error & ETH_LOSS_OF_CARRIER) ||
(mac_error & ETH_NO_CARRIER)) {
if ((mac_error & ETH_EXECESSIVE_COLLISIONS) || (mac_error & ETH_LATE_COLLISIONS) ||
(mac_error & ETH_EXECESSIVE_DEFERRAL) ||
(mac_error & ETH_TRANSMIT_JABBR_TIMEOUT) || (mac_error & ETH_LOSS_OF_CARRIER) ||
(mac_error & ETH_NO_CARRIER)) {
eth_stats_update_errors_tx(dev_data->iface);
}
break;
Expand Down Expand Up @@ -609,10 +599,10 @@

/* Tx config init: */
memset(&tx_config, 0, sizeof(ETH_TxPacketConfig));
tx_config.Attributes = ETH_TX_PACKETS_FEATURES_CSUM |
ETH_TX_PACKETS_FEATURES_CRCPAD;
tx_config.ChecksumCtrl = IS_ENABLED(CONFIG_ETH_STM32_HW_CHECKSUM) ?
ETH_CHECKSUM_IPHDR_PAYLOAD_INSERT_PHDR_CALC : ETH_CHECKSUM_DISABLE;
tx_config.Attributes = ETH_TX_PACKETS_FEATURES_CSUM | ETH_TX_PACKETS_FEATURES_CRCPAD;
tx_config.ChecksumCtrl = IS_ENABLED(CONFIG_ETH_STM32_HW_CHECKSUM)
? ETH_CHECKSUM_IPHDR_PAYLOAD_INSERT_PHDR_CALC
: ETH_CHECKSUM_DISABLE;
tx_config.CRCPadCtrl = ETH_CRC_PAD_INSERT;

/* prepare tx buffer header */
Expand Down Expand Up @@ -640,10 +630,14 @@
mac_config.DuplexMode =
PHY_LINK_IS_FULL_DUPLEX(state->speed) ? ETH_FULLDUPLEX_MODE : ETH_HALFDUPLEX_MODE;

mac_config.Speed =
IF_ENABLED(DT_HAS_COMPAT_STATUS_OKAY(st_stm32n6_ethernet),
PHY_LINK_IS_SPEED_1000M(state->speed) ? ETH_SPEED_1000M :)
PHY_LINK_IS_SPEED_100M(state->speed) ? ETH_SPEED_100M : ETH_SPEED_10M;
mac_config.Speed = IF_ENABLED(DT_HAS_COMPAT_STATUS_OKAY(st_stm32n6_ethernet),
PHY_LINK_IS_SPEED_1000M(state->speed) ? ETH_SPEED_1000M :) PHY_LINK_IS_SPEED_100M(state->speed)

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drivers/ethernet/eth_stm32_hal_v2.c:634  line length of 119 exceeds 100 columns
? ETH_SPEED_100M
: ETH_SPEED_10M;

/* The default configuration is ETH_SOURCEADDRESS_REPLACE_ADDR0,
* which is bad for bridging. */

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drivers/ethernet/eth_stm32_hal_v2.c:639  Block comments use a trailing */ on a separate line
mac_config.SourceAddrControl = ETH_SOURCEADDRESS_DISABLE;

hal_ret = HAL_ETH_SetMACConfig(heth, &mac_config);
if (hal_ret != HAL_OK) {
Expand Down Expand Up @@ -709,25 +703,21 @@
return 0;
}

int eth_stm32_hal_set_config(const struct device *dev,
enum ethernet_config_type type,
const struct ethernet_config *config)
int eth_stm32_hal_set_config(const struct device *dev, enum ethernet_config_type type,
const struct ethernet_config *config)
{
struct eth_stm32_hal_dev_data *dev_data = dev->data;
ETH_HandleTypeDef *heth = &dev_data->heth;

switch (type) {
case ETHERNET_CONFIG_TYPE_MAC_ADDRESS:
memcpy(dev_data->mac_addr, config->mac_address.addr, 6);
heth->Instance->MACA0HR = (dev_data->mac_addr[5] << 8) |
dev_data->mac_addr[4];
heth->Instance->MACA0HR = (dev_data->mac_addr[5] << 8) | dev_data->mac_addr[4];
heth->Instance->MACA0LR = (dev_data->mac_addr[3] << 24) |
(dev_data->mac_addr[2] << 16) |
(dev_data->mac_addr[1] << 8) |
dev_data->mac_addr[0];
(dev_data->mac_addr[2] << 16) |
(dev_data->mac_addr[1] << 8) | dev_data->mac_addr[0];
net_if_set_link_addr(dev_data->iface, dev_data->mac_addr,
sizeof(dev_data->mac_addr),
NET_LINK_ETHERNET);
sizeof(dev_data->mac_addr), NET_LINK_ETHERNET);
return 0;
#if defined(CONFIG_NET_PROMISCUOUS_MODE)
case ETHERNET_CONFIG_TYPE_PROMISC_MODE:
Expand Down
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