Releases: gevico/sdcc-c251
Release list
v4.6.0-mcs251-20260804
SDCC MCS-251 (C251) Port — v4.6.0-mcs251, built 2026-08-04
-
New MCS-251 target (Intel/STC 8-bit MCU with 24-bit address space)
-
STC32G144K246 SoC support with QEMU emulation
-
MCS251 ISA: byte extensions, MOVH, native word/dword arithmetic
-
Standalone MCS251 code generation backend (gen.c / gen_lower.c.inc)
-
Fixed register allocation for R0-R15 byte/word/dword tuples
-
MCS251-specific register tracking and peephole optimization
-
Native MCS251 multiplication (MUL) and dword add/sub
-
DPTR value tracking cache for redundant reload elimination
-
WR stack-operand merge (10→4 bytes per access)
-
ELF32 executable output from the MCS-251 linker
-
Native big-endian MCS251 ABI with 32-bit size_t
-
Big-endian register tuples and stack frames
-
Nonlocal-jump state in native byte order
-
C11/C17 language modes with GNU dialect support
-
Statement expressions, case ranges, extension
-
attribute, typeof, auto_type
-
Builtins: __builtin_expect, __builtin_constant_p
-
Bit operations: __builtin_popcount/clz/ctz/ffs/parity
-
Byte swap: __builtin_bswap16/32/64
-
Overflow: __builtin_add_overflow/sub/mul (generic and typed)
-
Empty aggregates, alternate keyword spellings
-
Compound literals in declarator initializers
-
Compatible incomplete array / repeated block-scope extern
-
MCS-51 family CI (compiler, assembler, UART smoke, full regression, QEMU)
-
Windows x64 binary package (MSYS2 UCRT64) published as GitHub Release
-
QEMU-based regression testing with deterministic icount
-
MCS-251 ABI specification and instruction coverage
-
GNU C and Zephyr compatibility status
-
Chinese SDCC user manual
-
Local Windows package build guide
-
Peephole expansion: 480→714 lines (+18 rules)
- WR merge, dptr reload elimination, push/pop adjacency, store-then-reload
-
DPTR value tracking cache in loadDptrFromOperand
Based on upstream SDCC 4.6.0 (tag: upstream-sdcc-4.6.0)