Passing f32 signalling NaN to a function converts to quiet NaN

[LewisGaul]

Zig Version

0.10.0-dev.63+6b8e33d14

Steps to Reproduce

const std = @import("std");
const expectEqual = std.testing.expectEqual;
const print = std.debug.print;

const snan_u32 = @as(u32, 0x7F800123);
const snan_f32 = @bitCast(f32, snan_u32);

fn bitcast(x: f32, u: u32) u32 {
    print("{}\n", .{x});
    print("0x{X:0>8}\n", .{u});
    print("0x{X:0>8}\n", .{@bitCast(u32, x)}); // What?!
    return @bitCast(u32, x);
}

test {
    // This is all as expected...
    print("0x{X:0>8}\n", .{snan_u32});
    print("0x{X:0>8}\n", .{@bitCast(u32, snan_f32)});
    try expectEqual(snan_u32, @bitCast(u32, snan_f32));
    print("-----\n", .{});
    // Passing into a function converts to a quiet NaN...
    const u = bitcast(snan_f32, snan_u32);
    try expectEqual(snan_u32, u); // Fails
}

Expected Behavior

Signalling NaN should not be changed when passed into a function.

Actual Behavior

32-bit signalling NaN gets converted to quiet NaN when passed into a function (high bit in the mantissa gets set).

This makes it impossible to correctly implement math.isSignalNan(), as I attempted to do in #10432!

[Hardy7cc]

Hi, I looked into this, however I got a bit stuck here.

I am not sure how to fix this so here some of my notes, maybe someone with deeper llvm knowledge can give some hints or take this on.

Minimal example

const snan_u32 = 0x7F800001; //std.math.nan_u32;

fn bitcastWrapper(x: f32) u32 {
    return @bitCast(u32, x);
}
export fn entry() void {
    const snan_f32_const = @bitCast(f32, snan_u32);
    var snan_f32_var = @bitCast(f32, snan_u32); // 0

    if (snan_u32 != @bitCast(u32, snan_f32_const)) unreachable; // 1 comptime does eliminate this branch
    if (snan_u32 != bitcastWrapper(snan_f32_const)) unreachable; // 2 error
    if (snan_u32 != @bitCast(u32, snan_f32_var)) unreachable; // 3 error
    if (snan_u32 != bitcastWrapper(snan_f32_var)) unreachable; // 4 error
}

• The first (1) dose work because it is completely comptime which in turn does eliminate the branch
• The other 3 (2-4) require a runtime value either by explicitly stating it with var or implicitly by using a function call. (As far as I understand it)

I did a deeper look at case 3 but I expect 2 and 4 to be basically the same.
During Sema the bitCast from snan_u32 to snan_f32_var (0) get eliminated and turned into a
constant initialization of the variable which probably is okay. (Sema.zig:fn bitCast)

// Air looks something like this when generated for (3) only.
  %15 = constant(u32, 2139095041)
  %16 = constant(f32, nan)

// (0)
  %12 = alloc(*f32)
  %18 = bitcast(*f32, %12)
  %19!= store(%18!, %16!)
// (3)
    %25 = load(f32, %12!)
    %26 = bitcast(u32, %25!)
    %27 = cmp_neq(%15!, %26!)

During lowering however the f32 const value gets converted into a f64. And I asume some where during this
conversion the MSB of the 23 bit mantisa (f32) get set (switch from signaling NaN to quiet NaN for most targets).

  %0 = alloca float, align 4
  store float 0x7FF8000020000000, ptr %0, align 4, !dbg !53
// 0x7FF  -> NaN of type double (1 sign bit and 11 bit exponent)
// 0xxxx8000020000000 -> payload of a f32 (23 bits where the 0x8 is the start of the f32 mantissa and the 0x2 are the last 3 bits of the f32 mantissa)
// meaning converted back to f32 -> 0x7fc00001

(llvm.zig:fn lowerValue)

https://llvm.org/docs/LangRef.html#simple-constants

When using the hexadecimal form, constants of types bfloat, half, float, and double are represented using the 16-digit form shown above (which matches the IEEE754 representation for double); bfloat, half and float values must, however, be exactly representable as bfloat, IEEE 754 half, and IEEE 754 single precision respectively.

[mikdusan]

I tested repro against #14201:

$ uname -a
Linux archlinux 6.1.1-arch1-1 #1 SMP PREEMPT_DYNAMIC Wed, 21 Dec 2022 22:27:55 +0000 x86_64 GNU/Linux

$ zig version
0.11.0-dev.1192+868cbb334

$ zig test issue.10449.zig
Test [1/1] test_0... 0x7F800123
0x7F800123
-----
nan
0x7F800123
0x7F800123
All 1 tests passed.