Release Notes

The following are the updates compared to previous release in CMSIS-NN v7.0.0

New operators and features

Experimental Floating-Point extension (AC6 compiler is recommended, there are known issues with GCC).
- Introduce float16/float32 operator APIs aligned with quantized CMSIS-NN.
- Make float support fully opt-in (f16, f32, or both) to avoid extra code size for integer-only builds. Enable float support by defining ARM_NN_ENABLE_F16 and/or ARM_NN_ENABLE_F32 to a non-zero value.
- Add optional optimized kernels for convolution, depthwise convolution, and pooling.
- Add GitHub Actions for FVP tests, host tests, and code-size tracking.
Python bindings for host buffer size functions.

Optimize arm_nn_requantize for Thumb-2 processors (enable by defining CMSIS_NN_USE_REQUANTIZE_INLINE_ASSEMBLY).

Fix state persistence and out-of-bounds access in int8 and int16 LSTM for non-time-major inference.
Fix integer overflow in single rounding requantization.
Fix dispatch condition mismatch in convolve wrapper buffer size functions.
Fix transpose convolution buffer size handling for DSP and MVE.
Fix int8 transpose convolution row alignment when vertical padding is not divisible by the stride.
Fix Clang and MSVC build issues.

Full Changelog: v7.0.0...v8.0.0