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feat(cxl): Addition of tests for CXL rules #314

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chetan-rathore merged 16 commits intoARM-software:mainfrom
Sujana-M:cxl_dev
Mar 28, 2026
Merged

feat(cxl): Addition of tests for CXL rules #314
chetan-rathore merged 16 commits intoARM-software:mainfrom
Sujana-M:cxl_dev

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  • Addition of tests for the CXL rule S_L8CXL_1

Sujana-M added 16 commits March 17, 2026 23:15
Change-Id: I5d28fc43ffe4a82d112e090fde13e6ba0246e18b
- define shared CXL info table structures in the
  PAL interface and populate them from ACPI CEDT
  (UEFI) or platform overrides (baremetal).
- add VAL CXL module to enumerate DVSECs, parse
  register locator blocks, collect HDM decoder
  metadata, and expose summary/lookup helpers
- hook CXL table allocation into the UEFI app
  lifecycle and print component summaries during
  PCIe enumeration
- list the new PAL and VAL CXL sources in their
  .inf manifests so the code ships with the build.

Signed-off-by: Sujana M <sujana.murali@arm.com>
Change-Id: I4b741753451ef8f10ed5f173c84890c53764b692
Change-Id: I674144d359f9c0e75700187b629f074cb25b8590
- introduce CXL module IDs, rule metadata, and string maps
  so rule-based execution can dispatch a cxl001 test
- expose the Flexbus DVSEC revision through val_cxl_get_info()
  and use it in the new version-check payload
- hook the test into SBSA runners, cmake test lists, and UEFI
  *inf manifests; advertise the module via -m CXL

Signed-off-by: Sujana M <sujana.murali@arm.com>
Change-Id: I9c386724a2b1cb40784b171fe20230f65ec227c4
- add cxl004 payload to verify CHBCR capability presence/absence
  requirements and integrate it with SBSA CXL execution, rule metadata.
- expose capability lookup helpers (val_cxl_find_comp_capability,
  val_cxl_cap_name) and extend CXL header definitions for newly
  validated capability IDs
- include the new test in all UEFI app *.inf files and cmake test lists
  so it builds with the existing suites

Signed-off-by: Sujana M <sujana.murali@arm.com>
Change-Id: Icd9c5ad6929b28cf8151ea5927007d3992d3a270
- add CHBCR address map validation (CXL_03)
- Verify every CHBCR window reported via CEDT has a valid component base
- register the new rule/test IDs with the rule tables, and execution enums
  so it can be invoked through rule-based flows
- list the test source in all SBSA UEFI *inf manifests and the CMake test
  manifest so it builds with the suite

Signed-off-by: Sujana M <sujana.murali@arm.com>
Change-Id: I30eae19e6de86a9eeafc6056e367651b640f6fae
- validate PCMO for persistent memory (CXL_10)
- add cxl010 payload to detect CXL Type-3 devices with HDM decoders
  require the CPU to advertise PCMO support via ID_AA64ISAR1_EL1.DPB
- register the new rule/test IDs with rule metadata, enum/string maps,
  and execution enums so it participates in SBSA CXL runs
- list the test source in all SBSA UEFI INF manifests and the CMake
  suite to compile it with existing workloads

Change-Id: I4bc3bcdbf37e25176d126a87c250db9075b661c0
Signed-off-by: Sujana M <sujana.murali@arm.com>
Change-Id: Iba09b0b9f8748454fde6c98cb68a82d647f511c2
- Add cxl002 (rule CXL_02) to validate Type1/Type2 path is behind
  SMMUv3 with ATS support.
- Add exerciser test e040 for ATS translation + DMA data-path check.
- Hook new entries into enums, wrappers, metadata, string map.
- Include new sources in UEFI INF files and tools/cmake/infra/sbsa_test.txt.
- Include related support updates in CXL/exerciser headers and ITS init.

Signed-off-by: Sujana M <sujana.murali@arm.com>
Change-Id: Ieb6b4313f8fba04a9ed8375e05ea123a9d96a7ed
- Introduces RCXL_11 and RCXL_12 rule handling in the CXL compliance
  check
- Adds rule metadata/registration so RCXL_09 is reported consistently
  with existing SBSA CXL rules.
- Hook new entries into enums, wrappers, metadata, string map.
- Include new sources in UEFI INF files and
  tools/cmake/infra/sbsa_test.txt.


Signed-off-by: Sujana M <sujana.murali@arm.com>
Change-Id: Id410a1b94007a16379a3fb97a1746c289af19af3
Signed-off-by: Sujana M <sujana.murali@arm.com>
Change-Id: Ibf1b179c56fbd75c8c11042819230737b0f09d59
Signed-off-by: Sujana M <sujana.murali@arm.com>
Change-Id: Ie470d6e81c9009a25028f388f23b8377fff920db
Signed-off-by: Sujana M <sujana.murali@arm.com>
Change-Id: Ia913ca0f2cd4a4692fb0e8daf9b7ae7433f3313d
- Added test for new rule RCXL_13
- Made the map_address as a VAL API for the tests cxl011.c, cxl013.c and e043.c

Signed-off-by: Sujana M <sujana.murali@arm.com>
Change-Id: I7c7ad578c3985c73c3261d905cb33002312f0a5c
- Updated the SBSA Scenario document for the implemented CXL Rules
- Updated the BM User guide and Validation methodology.

Signed-off-by: Sujana M <sujana.murali@arm.com>
Change-Id: Ife98c82102c30ce6cda1896a27fae6f025480ede
Change-Id: I6e281f90f34d9ca2212f450173fbffcb6b19998d
@chetan-rathore
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Closing this as it can't be rebased and merged due to conflicts.
Will raise a new one after rebasing.

@chetan-rathore chetan-rathore merged commit 4e84c01 into ARM-software:main Mar 28, 2026
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2 participants