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10 changes: 9 additions & 1 deletion .claude/board/CODEX_REVIEW_CHECKLIST.md
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- [ ] `/opt/jdks/jdk-26.0.2` used for production Java, `/opt/jdks/jdk-27` (JEP 401 EA) used ONLY for `valhalla-lab/` — no `--enable-preview`-compiled class ever reaches the production `java/` tree
- [ ] `df -h /` checked before and after any large parallel dispatch — target-dir residue is a known risk this session (`ISS-LGJ-TARGET-DIR-SIZE-WATCH`)

## 8. PR hygiene
## 8. The simd.rs isomorphism (root CLAUDE.md E1–E6 — added 2026-08-27, from three same-day strikes)

- [ ] No Java loop over rows, facets, or partial results in `src/main` — a Java-side reduction, however small, is an inline scalar fallback in the facade (E1). The tell to grep for: a doc comment defending Java-side compute on crossing count ("saves a crossing") — R8 measured bulk crossings as free, and that defence appeared verbatim on the violation
- [ ] Java scalar recomputes appear ONLY in test suites as oracles (E2) — the license `simd.rs` gives raw intrinsics under `#[cfg(test)]`, and nowhere else
- [ ] No hand-written row-geometry literal (`512`, `16`, `+ 4`, `+ 12`) in the facade — sizes and offsets come from `internal/ffm/Layouts`' DERIVED constants (E3); a second spelling of the layout is the carving-triplication defect minor 8 killed, reborn
- [ ] No Vector API in `src/main` (E4 — a backend inside Java; lab arms only)
- [ ] A new facade method is ONE delegation — anything more means the substrate is missing a word and the change starts backend-first (E5, the STOP rule)

## 9. PR hygiene

- [ ] Commit message body explains the WHY, not just the WHAT
- [ ] PR body includes a Test Plan with checkboxes, and states which falsification gates from `.claude/plans/lgj-vertical-slice-v1.md` were actually run (not just "should pass")
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45 changes: 45 additions & 0 deletions .claude/board/EPIPHANIES.md
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> `**Status:**`/`**Confidence:**` line. A correction gets its own new,
> dated entry that references the one it corrects — the storno rule.

## 2026-08-27 — E-JAVA-IS-SIMD-RS-VALHALLA-PANAMA-IS-THE-POLYFILL-1

**Status:** DOCTRINE — [OPERATOR-FRAMED]. Pinned as the ENFORCEMENT LAYER in
root `CLAUDE.md` (rules E1–E6), same commit.
**Confidence:** High — the grounding is measured in-tree, not argued.

The operator's frame, verbatim intent: *"look at ndarray. Java is like
simd.rs. Valhalla/Panama is the polyfill. Rust is like
simd_{AMX,avx512,avx2,neon,wasm}.rs."*

Verified against the actual tree before pinning: `ndarray/src/simd.rs` is
**37 functions and zero shipping instructions** — every raw intrinsic in the
file sits inside `#[cfg(test)]`, where `_mm256_unpacklo_epi32` appears only
as the oracle a wrapper is checked against. `simd_avx512.rs` alone carries
**488** intrinsics. And the detail that seals it: `simd_scalar.rs` is a
**backend, below the facade** — the fallback is never written inline in
`simd.rs`. The facade is pure vocabulary; the backends are pure machinery;
the dispatch is free at compile time.

**Why this is a doctrine and not an analogy.** Every violation this session
found reads as a breach of the isomorphism, at the layer it names:

- `FacetMatchView.cardinality`'s Java popcount loop = an inline scalar
fallback in `simd.rs` (three strikes: the loop, then 32 composed counts
summed in Java, then a proposed buffer-popcount symbol — each still Java
holding a moving part; ABI minor 9 is the lawful shape).
- J2's hand-written `ROW_BYTES = 512` beside the declared `ROW_LAYOUT` =
the facade carrying a second spelling of a backend constant (fixed this
commit: `Layouts` derives, `RowStore` names).
- The Vector API question resolves permanently: a backend inside Java, and
Java has no backends — lab arm forever.

**The polyfill reading is precise, not poetic.** Valhalla's A/B types
compile as ordinary records pre-JEP-401 exactly the way `simd.rs` code runs
on the scalar backend off-x86: one source, zero cost where the platform
provides it, still CORRECT where it does not. Panama likewise —
`JAVA_INT_UNALIGNED` works everywhere and JITs to a mov where it can.
Degradation without a second source is the definition of a polyfill.

**The stack nests.** lgj's bottom is ndarray's top: `lgj_hop` →
`kernels.rs` → `ndarray::simd` → `simd_avx512.rs` is facade → polyfill →
backend twice over, self-similar. Cross-refs: root `CLAUDE.md` E1–E6;
`E-BINDING-A-REAL-PROVIDER-MEASURES-THE-FIXTURE-1` (the ClassView half of
the same session); minor-9 arc entry in `LATEST_STATE.md`.

## 2026-08-27 — E-BINDING-A-REAL-PROVIDER-MEASURES-THE-FIXTURE-1

**Status:** FINDING — measured, pinned by a test rather than asserted.
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42 changes: 42 additions & 0 deletions .claude/board/ISSUES.md
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# Issues Log — Open + Resolved (double-entry, append-only)

## ISS-LGJ-HOP-LAYOUT-BLOCKS-THE-ALGEBRA (2026-08-27) — RESOLVED (same day; ABI minor 10)

**Found.** By landing R1 (selection as mask algebra) and measuring it.

**Measured.** 65 536 rows, all densities: the lawful shape costs
**~40 600 µs** where the shipped one-pass sweep costs ~2 100 µs — a **19×
regression** — because 32 facets × 2 predicates is 64 whole-population passes
at **stride 512**, ~2 GB of memory traffic to read 512 KB of classids. Scaling
is worse than linear (1 024 rows → 144 µs; 65 536 rows → 40 632 µs, 282× for
64× the rows), the signature of cache and TLB failing together.

**Root cause is the layout, not the algebra** — and it was priced before this
arc started. R11 (#31) measured AoS 512-stride at 12–13 ns/row against an SoA
facet lane at ~1.3 ns/row (**9.2×**) and found the layout already *data* at
every boundary except the store's constructor, with the kernels already
stride-parameterized. PR #40 then banked the opposite as a law — *"a scalar
gather beats a vectorised sweep; the win is in not doing the work"* — a
measurement taken inside the defect and generalised as a property of the
operation. That claim is superseded; see the storno on #40's arc entry.

**The fix is measured, not proposed.** A columnar `(row × facet)` plane —
same bytes, field-major — runs the identical algebra at **902–2 271 µs**,
~40× the AoS mask shape and 2.3–5.7× the sweep it replaces, with cost tracking
the canvas rather than the frontier (2.5× across a 10 000× density range).
Banked: `.claude/board/hop-mask-algebra-vs-columnar.txt`.

**RESOLVED — ABI minor 10 landed the columnar store**, exactly the shape
R11 priced: an additive constructor (`lgj_rowstore_open_columnar`, facet-
major: contiguous per-facet classid/lo64/hi32 blocks, same 512n bytes, same
draws) plus lane descriptors (33 → 97 lanes so every field is served).
Measured THROUGH THE ABI at 65 536 rows: hop **3.3–4.8×** over AoS at every
frontier arm, byte-identical answers, the pinned 10 → 19 → 29 on both
layouts. The register-sweep family refuses facet-major with the new
`UNSUPPORTED_LAYOUT` (-18) — a row-major operation stays honest about being
one — pinned two-sided (same calls succeed on AoS). Java is proven
LAYOUT-BLIND: its accessors read through served descriptors, and the
disable-run (stride hard-coded 512) fails the columnar store at the first
row where the layouts' addresses diverge. Remaining headroom, named not
hidden: the lab's single-plane pass measured a further ~10× beyond the
per-facet columnar sweep — a fused whole-region kernel is the next rung,
not this one.

## ISS-LGJ-ARC-INVENTORY-STOPPED-AT-32 (2026-08-27) — RESOLVED

**Found.** While landing PR #42's own arc entry, per the board README's
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155 changes: 155 additions & 0 deletions .claude/board/LATEST_STATE.md
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## 2026-08-27 — ABI minor 10: the columnar store LANDS, and Java is proven layout-blind

The R2 that #44 measured as a lab arm is now the substrate change R11
predicted it would be: **an additive constructor plus lane descriptors.**

- **`lgj_rowstore_open_columnar`** — facet-major over the `(row × facet)`
plane: classid / lo64 / hi32 regions, each 32 contiguous per-facet blocks;
same 512n bytes, same generator draws, same logical content (pinned:
`layouts_hold_identical_logical_content`, with an anti-vacuity guard that
the BYTES differ). A layout is a schema, not a resource kind — every
mask/hop/count symbol takes the handle unchanged.
- **Measured through the ABI** (65 536 rows, all 32 facets, equivalence
asserted before timing): hop **4.8× / 4.6× / 3.3×** over AoS at the
classid-frontier / 2-hop-frontier / full-population arms. The lab's fused
single-plane pass has a further ~10× in it — named as the next rung.
- **The lane table is the mechanism** (33 → 97): payload lo64/hi32 lanes
join classid, every descriptor carrying its layout's own offset+stride.
Java's per-row accessors now read ONLY through served descriptors —
`rowOffset` and the facade's last geometry constants are DELETED — and the
disable-run proves it two-sided: stride hard-coded to 512 fails the
columnar store at row 1 facet 0 (the first address divergence) while AoS
stays green. E3 is now structural on both sides of the membrane.
- **Honest refusal:** the register-sweep family (`facetSumAs`/`facetSum`/
layout probe) returns the new `UNSUPPORTED_LAYOUT` (-18) on facet-major —
the 12-byte register is deliberately split there, and gathering it back
per row would be the serialization this repo just spent a day removing.
Pinned two-sided; AoS unaffected.
- **The operator's stated facts, pinned as tests, not trusted:** every
carving group (6×2 / 4×3 / 3×4) is ≤ 4 bytes — half the JEP 401
flattening budget R4/R10 measured from the Valhalla side — and 512 plus
every columnar region/block offset is 64-aligned for any n
(`carving_groups_fit_the_flattening_budget_and_the_layout_is_64_aligned`).
- Gates: Rust **138/138** both feature configs, clippy `-D warnings` + fmt;
Java **314 core** (ColumnarStoreTest 10 new) **+ 143 consumer**; compat
proven BOTH directions against a real minor-9 library built from the
previous commit (minor-10 gate names the minor, never a missing symbol);
runtime-confirmed `abi 0.10`. `docs/abi.md` §18, symbol count 26,
status −18.

## 2026-08-27 — the simd.rs isomorphism pinned as the ENFORCEMENT LAYER; J2 closed

- **Doctrine pinned** (root `CLAUDE.md`, rules E1–E6; board entry
`E-JAVA-IS-SIMD-RS-VALHALLA-PANAMA-IS-THE-POLYFILL-1`): Java ↔ `simd.rs`
(facade, vocabulary only), Valhalla+Panama ↔ the cfg-dispatch polyfill,
Rust ↔ `simd_{arch}.rs` (all machinery). Grounded by measurement, not
analogy: 37 facade functions / 0 shipping instructions vs 488 intrinsics
in one backend; `simd_scalar` a backend BELOW the facade; facade
intrinsics only under `#[cfg(test)]` as oracles.
- **J2 closed under E3.** `RowStore`'s hand-written `ROW_BYTES = 512` /
`FACET_BYTES = 16` and the literal `+ 4` / `+ 12` payload offsets are
gone; `internal/ffm/Layouts` now DERIVES `ROW_BYTES` / `FACET_BYTES` /
`FACET_PAYLOAD_OFFSET` / `FACET_PAYLOAD_HI32_OFFSET` from
`ROW_LAYOUT`/`ROW_FACET` (`byteOffset(groupElement("payload"))`, the
u64's own `byteSize()` — no literal survives), and the facade names them.
One source, proven by the existing `SELF_CHECK`; the enforcement is the
DELETION of the second spelling, not a tautological test.
- Gates: Java 304 core unchanged; consumer suites unchanged (no signature
moved); Rust untouched by this commit beyond none.

## 2026-08-27 — ABI minor 9: the reduction moved to where the data is, and the placement rule is now ABI

Operator ruling, verbatim intent: *"java hands decorative where() through
Panama; Rust is doing mask ops, ONLY"* — and, on the first fix attempt,
*"java doesn't even know mask count."* Both corrections were needed, because
the violation survived one layer up from where it was first repaired.

- **The violation, three shapes of it.** `FacetMatchView.cardinality()` (1)
popcounted a fetched segment in a Java loop, doc-commented "deliberately
Java-side" to save a crossing; (2) after the first correction, composed 32
per-facet `maskOfFacetClass(...).count()` calls and summed in Java — every
OPERATION native, but the DECOMPOSITION (32 facets, a sum) still executing
in Java. Java knowing "32" is Java holding a moving part. (3) The fix I
first PROPOSED — "add a popcount symbol over the buffer" — was the same
disease: asking how to reduce a buffer Java should never hold.
- **Minor 9, one symbol:** `lgj_rowstore_facet_match_count(res, needle,
out_count)` — Σ_f popcount(class_f), computed natively with the same
strided-equality mask the classid ops use plus the sanctioned popcount. One
crossing, one u64 back; Java does not learn that the answer has parts.
`cardinality()` is now a single delegation. Falsifier runs the count against
TWO independent oracles (the `lgj_row_facet_match` buffer popcount — the
very reduction Java used to do — and a scalar recompute), plus absent-needle
zero and null-out rejection. 135/135 both feature configs.
- **Both gate directions proven against a REAL minor-8 library** (built from
`main` @ c6127c5 in a worktree): `cardinality` throws `AbiMismatchException`
naming minor 9 — never a bare missing symbol, never a silent fallback to a
Java-side loop. 8/8 compat checks. (Worktree lesson: path deps resolve
relative to the worktree, so it must sit beside the sibling repos, not in
/tmp.)
- **The stale-`.so` iron rule fired for real, and caught MY OWN gap.** The
root-invoked `cargo build --release --manifest-path ...` was silently
REFUSED (repo root resolves the default toolchain, below the 1.97 floor;
the MSRV error was hidden by tail-piping) — so the R1 Java runs earlier
today loaded a PRE-R1 `.so`. Harmless there only because R1 changes no
observable behaviour; the minor-9 `requireMinor` gate is what surfaced it,
exactly as #26/#27 designed. Correct build: from inside `native/lgj-abi`
(pinned toolchain) with `CARGO_TARGET_DIR` pointed at the root target Java
loads.
- **docs/abi.md**: 25 symbols; minor-9 history entry stating the placement
rule as ABI, not preference.

## 2026-08-27 — R1: the hop's selection is mask algebra again, and the layout is now the measured blocker

Operator ruling: *"there's no gathering — gathering is a serialization of what
is already there to begin with."* Correct, and the audit that followed found
the walk was not the only place the algebra had leaked.

- **R1 shipped, byte-identical.** `lgj_hop` selects with
`src ∧ class_f ∧ struct_f`, word-parallel. **134/134** including the pinned
10/19/29 regression — which is the proof the answer did not move — and
447/447 Java unchanged.
- **F2, which no PR in the arc had caught:** `payload_hi32 != 0` was an `if`
inside the row walk in EVERY version, PR #22's clean one included. It is a
per-row equality against zero, i.e. the same strided primitive as the classid
match, twelve bytes further into the facet. Closed for **one call site and
zero new kernels** — `simd_rowstore_u32_eq_mask` takes an arbitrary offset,
so `first_offset = f*16 + 0` is the class and `f*16 + 12` is the gate.
- **`facet_bits` / `facet_cache` / `FACET_CACHE_SLOTS` deleted.** Under the
operator's format-string reading of the 4+12 facet (`classid -F payload`,
PowerShell `"{0} {1}" -F $1,$2`) the memo was caching the interpolated
string. The projection is applied at read, never stored.
- **R1 alone is a 19× REGRESSION, and that is the finding.** 65 536 rows:
one-pass sweep 2 126 µs → mask algebra **40 632 µs**, flat in density. 32
facets × 2 predicates = **64 full passes at stride 512** ≈ 2 GB of traffic to
read 512 KB. At 1 024 rows it is 144 µs; 64× the rows costs 282× the time —
cache and TLB collapsing together. The algebra is right; the LAYOUT is the
defect, exactly as R11 (#31) priced it at 9.2× before this arc began.
- **R2 measured as a lab arm (R11 precedent, zero ABI change).** The canvas is
the **(row × facet) plane**, not the row: same 512 bytes reordered
field-major, so `class` and `struct` are ONE contiguous pass each with no
stride, participation is a PERIODIC operand (64 slots per word = exactly 2
rows × 32 facets, so it is one repeated `u64`, not a buffer), and `src`
expands 1 row-bit → 32 slot-bits by splat.

| 65 536 rows | 0.01 % | 1 % | 25 % | 100 % |
|---|---|---|---|---|
| sweep (shipped pre-R1) | 5 147 | 3 034 | 2 969 | 5 252 |
| gather (#40, the serialization) | 1.0 | 27.7 | 1 659 | 3 880 |
| mask algebra, AoS (R1) | 41 600 | 49 667 | 48 604 | 51 329 |
| **columnar plane (R2 probe)** | **902** | **1 066** | **1 367** | **2 271** |

Columnar is **~40×** the AoS mask shape, **2.3–5.7×** the one-pass sweep, and
beats the gather outright at 100 %. Its cost tracks the CANVAS, not the
frontier — 2.5× across a 10 000× density range — which is the signature the
mask-native invariant asks for. Equivalence asserted at all 12 configurations
per population: all four shapes byte-identical. Raw output banked at
`.claude/board/hop-mask-algebra-vs-columnar.txt`.
- **Honest boundary:** at a sparse frontier the gather is still faster in
absolute terms, because any whole-plane operation is O(population) and a walk
is O(frontier). That is not a defect to fix — it is the trade the doctrine
makes deliberately, and it is why the columnar number (flat in density)
matters more than the sparse-density comparison.
- **Not done:** the columnar store itself. The probe builds the plane from the
AoS store; a columnar STORE builds it at generation. That is the ABI-side
change and it is measured-but-unlanded.

## 2026-08-27 — the REAL ClassView provider is bound, and it measures the fixture's reach

The `ClassView` provider seam (§4-NG3, "a real ontology/cache provider is a
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7 changes: 7 additions & 0 deletions .claude/board/columnar-store-abi-bench.txt
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lgj_hop through the REAL ABI — AoS vs facet-major columnar (minor 10)
same content both layouts, equivalence asserted before timing
lgj_hop through the ABI, n_rows=65536, all 32 facets, median of 7
arm |src| aos_us columnar_us speedup
classid 3933 48504.4 10426.6 4.7x
hop2 6943 48227.5 8200.8 5.9x
all 65536 53601.1 14031.9 3.8x
22 changes: 22 additions & 0 deletions .claude/board/hop-mask-algebra-vs-columnar.txt
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hop shapes — sweep vs gather vs mask-algebra (AoS) vs columnar (row x facet plane)
release, x86-64-v4, shared 4-vCPU container, median of 7 reps
edge_classid=0 gate=0x0 radius=25, effective=all 32 facets
equivalence asserted at EVERY configuration: all four shapes byte-identical

== n_rows = 65536 ==
frontier density sweep_us gather_us mask_us colmn_us
6 0.01% 5146.9 1.0 41599.5 901.5
32 0.05% 2504.7 1.8 43757.2 1017.0
65 0.10% 2655.8 2.3 41782.9 1143.9
163 0.25% 2739.8 5.3 51184.1 1200.6
327 0.50% 2245.1 14.3 49686.0 1127.7
655 1.00% 3034.4 27.7 49667.3 1066.3
1310 2.00% 2766.2 62.2 49274.8 1088.2
3276 5.00% 2710.6 380.9 50909.4 1178.9
6553 10.00% 3659.7 759.9 49367.0 1229.6
16384 25.00% 2969.2 1659.3 48603.8 1366.7
32768 50.00% 3349.5 2365.8 49887.2 1626.8
65536 100.00% 5251.8 3879.5 51328.5 2270.9


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