Releases: CobbyCode/bp10-dsp-controller
Releases · CobbyCode/bp10-dsp-controller
Release list
BP10 DSP Controller v0.5.2
BP10 DSP Controller v0.5.2
Build: commit e4ecfd90
Most users should use the 4 MB product build.
The 16 MB files are an ESP32-S3 Devboard Build intended for the
experimental 16 MB flash / 8 MB Octal PSRAM development board. They
are not generic board firmware.
Changes
- UI: rename Music Delay to Delay and Music Phase to Phase in the
module summaries so the path-agnostic Generic ACP labels match the
existing Pre EQ and Out EQ naming. - UI: highlight the active Music or Rec path button in the same accent
colour used by primary actions, by adding a.btn-secondary.active
style next to the existing.btn-secondaryrule.
Artifacts
| File | Target | Use |
|---|---|---|
bp10-dsp-controller-v0.5.2-4mb-product-ota.bin |
4 MB Flash, 2 MB Quad PSRAM (Product / A800X mini) | Firmware update on already-installed controllers |
bp10-dsp-controller-v0.5.2-4mb-product-full.bin |
4 MB Flash, 2 MB Quad PSRAM (Product / A800X mini) | First installation or full recovery |
bp10-dsp-controller-v0.5.2-16mb-devboard-ota.bin |
16 MB Flash, 8 MB Octal PSRAM (ESP32-S3 Devboard Build) | Firmware update on already-installed controllers |
bp10-dsp-controller-v0.5.2-16mb-devboard-full.bin |
16 MB Flash, 8 MB Octal PSRAM (ESP32-S3 Devboard Build) | First installation or full recovery |
SHA256SUMS.txt |
— | SHA-256 checksums of all BINs |
Verified
generic_acp_host_tests: PASSnvs_settings_host_tests: PASSconfig_io_host_tests: PASSdelay_verify_host_tests: PASSbass_path_isolation_host_tests: PASSa800x_frame_baseline_compare: PASS- 0.5.2 flashed via OTA on A800X (
.123): version 0.5.2 reported, module
labels show as Delay and Phase, active Music/Rec path button is
highlighted. - 0.5.2 built and flashed via serial on Generic devboard (
.122).
Release 0.5.1 – DRC mode unlock, consistent Load Factory Values
0.5.1 - 2026-07-25
- Remove profile-dependent DRC mode lock on AIYIMA A800X: all modes 0-6
(Full Band, 2 Band, 2 Band + Full Band) are now selectable through the
same shared DRC view, matching the Generic ACP profile behaviour. - Expand the A800X DRC view codec so that non-zero modes expose the correct
lower, upper, full band visibility, crossover, and Q controls. - Keep the A800X DRC wire protocol (54-byte four-path format) unchanged;
all mode writes, readbacks, persist, import, and export operate through
the existing full-frame codec. - Make the DRC Load Factory Values button active in every mode. Clicking it
resets the local form to mode 0 Full Band with the known A800X factory
values without writing to the DSP until Apply. - UI label: PreEQ → Pre EQ for consistency with Out EQ.
Web OTA Binaries
bp10_dsp_controller-0.5.1-4mb.bin– 4 MB Flash, 2 MB Quad PSRAMbp10_dsp_controller-0.5.1-16mb.bin– 16 MB Flash, 8 MB Octal PSRAM
Full Flash Images
bp10-dsp-controller-full-4mb.bin– serial flash at 0x0bp10-dsp-controller-full-16mb.bin– serial flash at 0x0
See SHA256SUMS.txt for integrity verification.
BP10 DSP Controller 0.5.0
Highlights
- Separate Generic Music and Rec DSP paths with path-aware persistence
- PreEQ and Out EQ readback baselines and local preview state
- USB Out Gain support
- Shared mode-aware DRC frontend and schema-driven codecs
- Multi-path configuration import, export, verify, and save
- Preserved AIYIMA A800X single-path compatibility
Images
- OTA update:
bp10-dsp-controller-v0.5.0-ota.bin - Full serial flash:
bp10-dsp-controller-v0.5.0-full.bin - Verify downloads with
SHA256SUMS.txt.
Validated with host tests and hardware smoke tests on Generic ACP and AIYIMA A800X.
v0.4.6 – Delay readback fix, host tests, updated README
Changes
- Delay readback fix: Only verify delay/hq params when delay is enabled; DSP may normalize/zero params when OFF
- Profile persistence: Preserve user-requested delay params even when OFF
- Host tests: Added
delay_verify_host_testscovering ON/OFF state and param matching - README: Comprehensive update with building instructions, Wi-Fi setup, supported devices, and safety notes
Artifacts
| File | SHA-256 |
|---|---|
bp10_dsp_controller.bin (OTA) |
46b8ba58c10e9a87fea76a0b27d3500e4d79e98ded2826e0f57321fd7949b871 |
bp10-dsp-controller-full.bin (Full) |
29920bb1a67c0f36a8cb2f131542f5ac50c061fc4330b5eae8d20f264e0bc2cb |
- OTA binary: 1,010,144 bytes
- Full flash binary: 1,141,216 bytes
- Target: ESP32-S3, 4 MB Flash, 2 MB Quad PSRAM
- ESP-IDF 6.0.2