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Brhd support#915

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miczyg1 merged 23 commits into
dasharo-25.12from
brhd_support
Jul 8, 2026
Merged

Brhd support#915
miczyg1 merged 23 commits into
dasharo-25.12from
brhd_support

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@miczyg1 miczyg1 commented Jun 12, 2026

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miczyg1 added 22 commits July 8, 2026 14:08
Turin platform may halt during bios_mmap_init if the SPI ROM mapping
is different than 0. When SPI ROM mappign is 3, the flash space is
still linear, but reversed. However, test shown that the mapping
still works correctly in the 3-2-1-0 scenario.

To avoid halting early, allow the SPI remapping to 3 to be allowed.

Upstream-Status: Pending
Change-Id: I5d93babed374224ae98fac6d515b41742ec7e0d8
Signed-off-by: Michał Żygowski <michal.zygowski@3mdeb.com>
Fix bad condition on checking ROM Armor activity. PSP SMIs must be
always configured when SOC_AMD_COMMON_BLOCK_PSP_SMI is selected,
except when ROM Armor 3 is enabled and enforced.

Upstream-Status: Pending
Change-Id: I5c541ea898ace2ecda66191218e9c3bdddc01804
Signed-off-by: Michał Żygowski <michal.zygowski@3mdeb.com>
Linux sp5100_tco driver may unconditionally enable the FCH watchdog.
It is necessary to report its resource, so that PCI device MMIO is not
allocated there.

Upstream-Status: Pending
Change-Id: Iff7b3f1a3b95f2bcfaab1409de28f2aecd259457
Signed-off-by: Michał Żygowski <michal.zygowski@3mdeb.com>
Add API to access the HPET ACPIMMIO space.

Upstream-Status: Pending
Change-Id: Iba9ba21f217575a7b1fa241d07f781916751e949
Signed-off-by: Michał Żygowski <michal.zygowski@3mdeb.com>
Ensure the legacy IRQs are disabled for HPET. We unconditionally
enable HPET MSI capability, so the interrupts may still work.
In CB:93459 it has been observed that when HPET is enabled and
RTC device does not advertise IRQ in ACPI, rtcwake does not work
in Linux.

Since RTC and HPET cannot both advertise legacy IRQ simultaneously
due to resource conflict in Windows Device Manager, do not enable
legacy IRQs on HPET. There is a bit called LegacyEn in the HPET
MMIO space offset 0x10, which controls the legacy interrupts IRQ0
and IRQ8 enabling for the timers.

Ensure the bit is cleared, so that the HPET timer will work with
MSI interrupts only. Check the bit value and report the IRQs in HPET
if the bit is set.

TEST=Use rtcwake to power on the Gigabyte MZ33-AR1 after a poweroff.

Upstream-Status: Pending
Change-Id: I3a5a6874be5b14dc1f2495e507768f21bfbd6f69
Signed-off-by: Michał Żygowski <michal.zygowski@3mdeb.com>
Add settings to specify the polarity of PCIe signals. Some board designs
invert RX or TX lines on the connectors.

Upstream-Status: Pending
Signed-off-by: Michał Żygowski <michal.zygowski@3mdeb.com>
Avoid adding APOB NV or BIOS NV is size is not specified. Otherwise,
the PSP BIOS directory may end up with BIOS NV of base 0 and size 0.

Upstream-Status: Pending
Signed-off-by: Michał Żygowski <michal.zygowski@3mdeb.com>
Include new PMU firmware file in the PSP BIOS directories that
are available on Turin SOC.

Upstream-Status: Pending
Signed-off-by: Michał Żygowski <michal.zygowski@3mdeb.com>
It is not required to build multilevel directories to make the platform
boot. If multilevel is disabled, the blob footprint is reduced due
to inclusion of a single copy of given blob, at the cost of PSP
recovery, which we do not support anyways.

Upstream-Status: Pending
Signed-off-by: Michał Żygowski <michal.zygowski@3mdeb.com>
AMD FCH UARTs can work with 3M baud rates.

Upstream-Status: Pending
Signed-off-by: Michał Żygowski <michal.zygowski@3mdeb.com>
The bootblock may be placed in the CBFS as in the old days. The
Makefile.mk that prepares parameters for amdfwtool must simply
pass the right parameters about BIOS_BIN to be uncompressed and
where to look for the bootblock in flash. On AMD platforms it can
be the last block of COREBOOT region of C_ENV_BOOTBLOCK_SIZE.

Upstream-Status: Pending
Signed-off-by: Michał Żygowski <michal.zygowski@3mdeb.com>
Upstream-Status: Pending
Signed-off-by: Michał Żygowski <michal.zygowski@3mdeb.com>
Upstream-Status: Pending
Signed-off-by: Michał Żygowski <michal.zygowski@3mdeb.com>
Add APCBs from R22_F15 vendor BIOS image.

Upstream-Status: Pending
Signed-off-by: Michał Żygowski <michal.zygowski@3mdeb.com>
On server platforms the maximum number of logical processors
is greater than default 64 defined in the DSC file. Use MAX_CPUs
Kconfig value to pass the epxected maximum processor count and
use the 100ms increments for each processor for the AP init timeout
as coreboot does for its own MP init.

TEST=Boot Gigbyte MZ33-AR1 with 128 core processor

Upstream-Status: Pending
Signed-off-by: Michał Żygowski <michal.zygowski@3mdeb.com>
Increase MAX_ACPI_TABLE_SIZE_KB to fit all ACPI tables when a higher
core count CPU is used. The SSDT gets linearly bigger with higher core
count and the default fixed allocation for ACPI tables is not enough.

Upstream-Status: Pending
Signed-off-by: Michał Żygowski <michal.zygowski@3mdeb.com>
We do not cover enough of memory with page tables to reach higher
memory than 1TB. When there is more memory than 1TB in the system,
RMP is unreachable, resulting in page faults.

Upstream-Status: Pending
Signed-off-by: Michał Żygowski <michal.zygowski@3mdeb.com>
Add missing memory hole definitions to have human readable information
what given hole represents.

Upstream-Status: Pending
Signed-off-by: Michał Żygowski <michal.zygowski@3mdeb.com>
If holes are not continuous, we may end up loosing some RAM, e.g.
if Remap1Tb entry is present in the list of holes.

Upstream-Status: Pending
Signed-off-by: Michał Żygowski <michal.zygowski@3mdeb.com>
Some bridges were missing the operations and were not marked
as hidden. Fix it for consistency.

Also the intenal GPP bridges are PCIe bridges and should use PCIe
bridge scann method. Otherwise, the devices may end up with mismatched
MaxPayload capability. For openSIL, which does not program PCIe
capabilities yet on the bridges and devices behind them, let coreboot
do it.

For external GPP bridges assign hotplug ops if hotplug enabled and port
is capable of hotplugging.

Upstream-Status: Pending
Signed-off-by: Michał Żygowski <michal.zygowski@3mdeb.com>
Since SDXI devices are not visible by default, turn them off.

Upstream-Status: Pending
Signed-off-by: Michał Żygowski <michal.zygowski@3mdeb.com>
Add missing ACP device described in the Turin PPR.

Upstream-Status: Pending
Signed-off-by: Michał Żygowski <michal.zygowski@3mdeb.com>
Upstream-Status: Inappropriate [custom config]
Change-Id: I0d191f9637e04faca745d44ce3c47e0a3a57219e
Signed-off-by: Michał Żygowski <michal.zygowski@3mdeb.com>
@miczyg1 miczyg1 merged commit 96ae063 into dasharo-25.12 Jul 8, 2026
64 checks passed
@miczyg1 miczyg1 deleted the brhd_support branch July 8, 2026 14:25
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